February 12, 2025, 02:05:14 PM

Recent posts

#31
STMP1 / Re: Backup Power for STMP157-O...
Last post by Azriel - January 17, 2025, 07:41:10 PM
Thank you so much for your help.
I have eventually opted to go with the 3.6v Cornell Dubilier EDS155Z3R6 supercapacitor:(https://www.cde.com/resources/catalogs/EDS.pdf)
It has a charge capacity of 1.5 Farads which at 3.6v will provide 5.4 AmpSeconds. Seems like more than enough to allow the CPU pack-up its stuff together before power is lost.
I hope this will work Ok...
#32
STMP1 / Re: Backup Power for STMP157-O...
Last post by LubOlimex - January 17, 2025, 09:16:05 AM
There is setup up convertor U10 MT3608 - it creates 5V from the Li-Po. Refer to the schematic.

I can't say about the batteries. There might be other options as long as they work in the same voltage range as Li-Po batteries and the battery can be attached properly to the connector (e.g. respecting + and -) - it should be fine.
#33
NXP / Re: Stackup thickness - iMX8 S...
Last post by LubOlimex - January 17, 2025, 08:52:40 AM
From my experience with RAM memories and Linux-enabled boards - it is not something set in stone, you might calculate but you can also empirically test with different frequency and timings. Just make sure to run long memory stress tests to ensure the settings you've entered are stable.

Also if you have to change the memory in future (due to unavailability, price gouging, etc), it is quite likely these settings would need to be changed again even if you find a memory with the same properties. There is always some difference in behavior when you change the RAM.

QuoteIf you are able to share an email address with me privately, I would be happy to share the PDF version of this for you to add to your official documentation.

You can use support@olimex.com

QuoteUh... I don't really understand this comment. Part of why I needed to ask in the first place is that your DRAM breakout has multiple trace geometries in it - 3.2mil for the SOC fanout, then 5 mil for the meander to the DRAM. It was hard for me to know which one was your target geometry without a trace impedance table.

I am working on making a Trace Impedance Table separately to compare your target impedances against the ones I used.

It is just something we don't have currently ready for sharing and will require extra work, and our team is busy with other projects. Basically what you have to do to measure, someone here has to do the same to confirm the values during designing the board. I will add it in our TODO list and it will probably get published in future just don't expect it asap.

QuoteI'm so glad you pointed that out! This is the tool I'm using to check our own boards. Are you able to share any information on how to run this on the iMX8MP SOM + EVB?

I can't remember if we ever used the tool for testing mainly for calculations, for RAM testing we used memtester (it is the tool available after building the image and doesn't require anything else). So if you managed to get it working on the Olimex board it will be very helpful for others if you can share how you get it working exactly.
#34
STMP1 / Re: Backup Power for STMP157-O...
Last post by Azriel - January 17, 2025, 12:18:45 AM
These are 3.7v batteries. The board is running on 5v. Does the on-board power management chip (AXP209?) make the appropriate conversion?
Also, the proposed batteries have a rather limitted operating temperature range. Are there other options?
#35
A20 / update to Debian 12 (Bookworm)
Last post by d4 - January 16, 2025, 10:22:20 PM
dear Olimex, is there a plan (and a timeline) for availability of images for Debian 12 (Bookworm) for A20 boards?
(I have a A20-OLinuXino-LIME ).
Thanks. a.
#36
A64 / Re: Can we upgrade from Debian...
Last post by d4 - January 16, 2025, 10:14:27 PM
what about upgrading to Debian 12 (Bookworm) ? It was released june 2023
#37
A64 / Re: Can we upgrade from Debian...
Last post by d4 - January 16, 2025, 10:02:57 PM
I did update from buster to bullseye "in place", and it worked. a.
#38
NXP / Re: Stackup thickness - iMX8 S...
Last post by cushychicken - January 16, 2025, 06:51:35 PM
Quote from: LubOlimex on January 16, 2025, 09:45:20 AMWe don't have a table suitable for publishing and it will require further effort to make it presentable.

One of the nice things about newer KiCAD versions is that they include tools for making tables like this easily. I imported your design into KiCAD v8 and made the following stackup on the Comments layer:

https://imgur.com/a/olimex-som-stackup-3W0OvNh

If you are able to share an email address with me privately, I would be happy to share the PDF version of this for you to add to your official documentation.

Quote from: LubOlimex on January 16, 2025, 09:45:20 AMBut such a table is not really needed since all lengths can be measured from the sources.

Uh... I don't really understand this comment. Part of why I needed to ask in the first place is that your DRAM breakout has multiple trace geometries in it - 3.2mil for the SOC fanout, then 5 mil for the meander to the DRAM. It was hard for me to know which one was your target geometry without a trace impedance table.

I am working on making a Trace Impedance Table separately to compare your target impedances against the ones I used.

Quote from: LubOlimex on January 16, 2025, 09:45:20 AMI don't think the DRAM in our board is running at max speed either. Have to check the sources. Family-DDR-Tool-Release/ta-p/1104467

Thanks for sharing that! We started our build off of the last stable mainline buildroot version, which had DRAM speed pegged to 2000MHz. This was failing to configure and had extra tight eye margins, and failed many basic write/readback tests. Turning down the speed to 1600MHz helped us get to stable operating conditions. I'd be curious to know your operating bus speed - I am trying to eliminate a few possible sources of error on my end.

Quote from: LubOlimex on January 16, 2025, 09:45:20 AMFor RAM related issues it is good idea to also check the iMX forums and maybe use the iMX DDR tool: https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467

I'm so glad you pointed that out! This is the tool I'm using to check our own boards. Are you able to share any information on how to run this on the iMX8MP SOM + EVB?

I was able to run it on our custom boards by reworking a USB cable into a bus that I cut the endpoint to. I am not having much success with getting the DDR tool to run on the Olimex SOM. I tried reworking in to USB1 several times, but that did not work. (All attempts used the iMX8M in serial downloader mode.)

I'm going to try again today with some USB A to USB A cables I got from Amazon. I'll let you know how it goes. If you have any hints or ideas of what I may be getting wrong, I'm all ears for getting it working.

Finally - thank you so much for releasing this board design to the world. I have worked with many iMX series chips in my career, and it's a real delight to get to work with one in KiCAD, which is by far my favorite CAD package. Much love for Olimex.  ;D  :)
#39
STMP1 / Re: Backup Power for STMP157-O...
Last post by LubOlimex - January 16, 2025, 04:47:02 PM
#40
STMP1 / Backup Power for STMP157-Olinu...
Last post by Azriel - January 16, 2025, 03:41:18 PM
Hi, please recommend an appropriate Battery or preferably supercapacitor to keep the card alive for a short period of main power outage of a few seconds