- Welcome to Olimex Support Forum.
Olimex Support Forum
Recent posts
#1
ST / Re: OLIMEXINO-STM32F3 and ADXL...
Last post by mgolbs - July 07, 2026, 03:16:07 PMHello,
many thanks for the information an the listing of ports/pins!
Greeting Markus
many thanks for the information an the listing of ports/pins!
Greeting Markus
#2
ST / Re: OLIMEXINO-STM32F3 and ADXL...
Last post by LubOlimex - July 07, 2026, 11:36:48 AMSPI should be possible why not. You should use 4-wire SPI. If using the UEXT connector:
ADXL375 pin UEXT pin OLIMEXINO-STM32F3 signal
----------------------------------------------------
VIN 1 +3.3V
GND 2 GND
SDO 7 SPI1 MISO, D12 / PA6
SDA 8 SPI1 MOSI, D11 / PA7
SCL 9 SPI1 SCK, D13 / PA5
CS 10 GPIO chip select, D4 / PB5
The onboard microSD uses SPI2 separately.
So the recommended setup is ADXL375 on UEXT/SPI1 and microSD on SPI2. Of course, some software effort will be needed.
ADXL375 pin UEXT pin OLIMEXINO-STM32F3 signal
----------------------------------------------------
VIN 1 +3.3V
GND 2 GND
SDO 7 SPI1 MISO, D12 / PA6
SDA 8 SPI1 MOSI, D11 / PA7
SCL 9 SPI1 SCK, D13 / PA5
CS 10 GPIO chip select, D4 / PB5
The onboard microSD uses SPI2 separately.
So the recommended setup is ADXL375 on UEXT/SPI1 and microSD on SPI2. Of course, some software effort will be needed.
#3
ST / OLIMEXINO-STM32F3 and ADXL375 ...
Last post by mgolbs - July 07, 2026, 10:13:37 AMHello,
can I use a adafruit ADXL375 - High G Accelerometer (+-200g) with SPI and mircosd write on a OLIMEXINO-STM32F3 and witch port must I use, 3 ore 4 wire SPI?
[CS, SDO, SDA and SCL]
https://github.com/OLIMEX/OLIMEXINO-STM32F3/blob/master/HARDWARE/OLIMEXINO-STM32F3-revision-D/OLIMEXINO-STM32F3_Rev_D.pdf
Goal is, use the raw x, y and z acce with 100Hz sample, internal ADXL375 ADXL375_DATA_RATE_200. 24g are not enough in a drum. If SPI not possible, then must I use I2C.
Greeting Markus
can I use a adafruit ADXL375 - High G Accelerometer (+-200g) with SPI and mircosd write on a OLIMEXINO-STM32F3 and witch port must I use, 3 ore 4 wire SPI?
[CS, SDO, SDA and SCL]
https://github.com/OLIMEX/OLIMEXINO-STM32F3/blob/master/HARDWARE/OLIMEXINO-STM32F3-revision-D/OLIMEXINO-STM32F3_Rev_D.pdf
Goal is, use the raw x, y and z acce with 100Hz sample, internal ADXL375 ADXL375_DATA_RATE_200. 24g are not enough in a drum. If SPI not possible, then must I use I2C.
Greeting Markus
#4
STMP1 / Re: STM32MP1-OLinuXino-LIME: s...
Last post by LubOlimex - July 07, 2026, 08:50:56 AMTry testing the SD cards. Good free software for testing the SD cards is either f3
(fight flash fraud) or H2testW. There are a lot of counterfeit SD cards out
there and also cards tend to get damaged easily.
(fight flash fraud) or H2testW. There are a lot of counterfeit SD cards out
there and also cards tend to get damaged easily.
#5
STMP1 / Re: STM32MP1-OLinuXino-LIME: s...
Last post by dry - July 07, 2026, 07:17:55 AMHello LubOlimex,
Thank you for replying,
Yea, I have looked since at the board and the shield schematics, and saw that there isn't but 3.3V available with micro SD cards.
Also I have one card I've tested on this LIME2 board which is probably 'too fast' for it: it starts failing from clean brand new fs formated on it and from first mount: just start getting corruption immediately on mount. With 2 different fs tried.
This is Patriot brand, C10 A2 U3 etc.. Probably, not liking slower speeds, no idea but, SanDisk of similar grade works Ok, at least in the main onboard micro sd slot.
Thank you for replying,
Quote from: LubOlimex on July 06, 2026, 01:26:32 PM1. There are both hardware and software limitations to use such a fast card optimally with this board.
Yea, I have looked since at the board and the shield schematics, and saw that there isn't but 3.3V available with micro SD cards.
Also I have one card I've tested on this LIME2 board which is probably 'too fast' for it: it starts failing from clean brand new fs formated on it and from first mount: just start getting corruption immediately on mount. With 2 different fs tried.
This is Patriot brand, C10 A2 U3 etc.. Probably, not liking slower speeds, no idea but, SanDisk of similar grade works Ok, at least in the main onboard micro sd slot.
#6
STMP1 / Re: STM32MP1-OLinuXino-LIME: s...
Last post by LubOlimex - July 06, 2026, 01:26:32 PMOn the fly my thoughts on this:
1. There are both hardware and software limitations to use such a fast card optimally with this board. For sure A2 and faster cards require special software treatment. As I wrote in the manual some years ago: "For best experience use a micro SD card with speed rating between class 10 and A1. Using slower than class 10 card might severely degrade the user experience. Beware that A2 or faster cards might lack software support in Linux."
2. Yes, microSD wiring the card is powered from fixed 3.3 V and the SDMMC I/O is not switched to 1.8 V. The practical maximum is 4-bit SD High-Speed at about 50 MHz. The reported timing spec: sd high-speed, bus width: 4 bits, and signal voltage: 3.30 V are correct.
3. The card expects UHS-capable host, but the speeds are not reachable on a fixed 3.3 V 50 MHz host. O_DIRECT/O_SYNC on ext4 is a very strict test, especially for writes, so it can show much lower numbers than the card's marketing rating. For bus/card comparison it is better to also test large-block direct I/O without per-write sync, or read from the raw block device.
1. There are both hardware and software limitations to use such a fast card optimally with this board. For sure A2 and faster cards require special software treatment. As I wrote in the manual some years ago: "For best experience use a micro SD card with speed rating between class 10 and A1. Using slower than class 10 card might severely degrade the user experience. Beware that A2 or faster cards might lack software support in Linux."
2. Yes, microSD wiring the card is powered from fixed 3.3 V and the SDMMC I/O is not switched to 1.8 V. The practical maximum is 4-bit SD High-Speed at about 50 MHz. The reported timing spec: sd high-speed, bus width: 4 bits, and signal voltage: 3.30 V are correct.
3. The card expects UHS-capable host, but the speeds are not reachable on a fixed 3.3 V 50 MHz host. O_DIRECT/O_SYNC on ext4 is a very strict test, especially for writes, so it can show much lower numbers than the card's marketing rating. For bus/card comparison it is better to also test large-block direct I/O without per-write sync, or read from the raw block device.
#7
A20 / Re: Recurring SATA HD error on...
Last post by LubOlimex - July 06, 2026, 09:46:25 AMYou said 1TB but the log says "WDC WD20SPZX" which is 2TB hard disk.
It is something around the powering for sure but whether is it due to cable, power source or board failing or design downgrade it is hard to say. Need more info:
1. How do you power the disk? Is it via SATA-CABLE-SET and the SATA connector?
2. Did you test with the same cable and the same power supply with the other board (where it doesn't fail)?
3. Did this work at start and started failing at some point? Or it didn't work since start?
4. Where do you boot from?
5. How hard it is to replicate? How often does it occur?
6. Does this happen with other, older revisions of the board?
7. Is it just one board that experiences this issue?
It is something around the powering for sure but whether is it due to cable, power source or board failing or design downgrade it is hard to say. Need more info:
1. How do you power the disk? Is it via SATA-CABLE-SET and the SATA connector?
2. Did you test with the same cable and the same power supply with the other board (where it doesn't fail)?
3. Did this work at start and started failing at some point? Or it didn't work since start?
4. Where do you boot from?
5. How hard it is to replicate? How often does it occur?
6. Does this happen with other, older revisions of the board?
7. Is it just one board that experiences this issue?
#8
STMP1 / STM32MP1-OLinuXino-LIME: suppo...
Last post by dry - July 03, 2026, 04:18:02 PMI noticed that microSD R,W performance seems very slow. I don't belive its the card's issue - C10, V30, U3, A2.
The card under test is a SanDisk Extreme 64GB, marked V30 / U3 / A2. It is detected as mmcblk1:
mmc1: new high speed SDXC card at address aaaa
mmcblk1: mmc1:aaaa SN64G 59.5 GiB
EXT4-fs (mmcblk1p4): mounted filesystem
The debugfs MMC status shows:
clock: 50000000 Hz
actual clock: 49500000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
bus width: 2 (4 bits)
timing spec: 2 (sd high-speed)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
In dmesg I also see the controller reported with "pio":
mmci-pl18x 58005000.sdmmc: mmc1: PL180 manf 53 rev1 at 0x58005000 irq 56,0 (pio)
My measured performance on /test, using diskspd-for-linux with O_DIRECT/O_SYNC, is approximately:
Sequential read: ~10.6 MiB/s
Sequential write: ~2.1 MiB/s
Random 4K read: ~898 IOPS
Random 4K write: ~81 IOPS
Could you please clarify:
1. The STM32MP157 SoC can support better SDMMC modes than plain 50 MHz SD High-Speed,
so do I undersand it correctly, the Olimex board microSD slot wired for fixed 3.3V SD High-Speed operation, it cannot do 1.8V / UHS-I?
2. Is DMA expected to be available for this SDMMC controller, or is PIO mode normal on this board/kernel configuration?
3. Are there any recommended device-tree or kernel settings required to enable the best supported SDMMC performance?
My kernel:
Linux stm32mp1-olinuxino-lime 5.10.180-olimex #075247 SMP Tue Jun 30 07:54:18 UTC 2026 armv7l GNU/Linux
And my enabled overlays are:
stm32mp1-hdmi.dtbo STM32MP1-OLinuXino Enable HDMI
stm32mp1-mmc3.dtbo Enable MMC3 extension
(So i tested both slots: on board, and through slot on the shield extension board, almost same results)
The card under test is a SanDisk Extreme 64GB, marked V30 / U3 / A2. It is detected as mmcblk1:
mmc1: new high speed SDXC card at address aaaa
mmcblk1: mmc1:aaaa SN64G 59.5 GiB
EXT4-fs (mmcblk1p4): mounted filesystem
The debugfs MMC status shows:
clock: 50000000 Hz
actual clock: 49500000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
bus width: 2 (4 bits)
timing spec: 2 (sd high-speed)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
In dmesg I also see the controller reported with "pio":
mmci-pl18x 58005000.sdmmc: mmc1: PL180 manf 53 rev1 at 0x58005000 irq 56,0 (pio)
My measured performance on /test, using diskspd-for-linux with O_DIRECT/O_SYNC, is approximately:
Sequential read: ~10.6 MiB/s
Sequential write: ~2.1 MiB/s
Random 4K read: ~898 IOPS
Random 4K write: ~81 IOPS
Could you please clarify:
1. The STM32MP157 SoC can support better SDMMC modes than plain 50 MHz SD High-Speed,
so do I undersand it correctly, the Olimex board microSD slot wired for fixed 3.3V SD High-Speed operation, it cannot do 1.8V / UHS-I?
2. Is DMA expected to be available for this SDMMC controller, or is PIO mode normal on this board/kernel configuration?
3. Are there any recommended device-tree or kernel settings required to enable the best supported SDMMC performance?
My kernel:
Linux stm32mp1-olinuxino-lime 5.10.180-olimex #075247 SMP Tue Jun 30 07:54:18 UTC 2026 armv7l GNU/Linux
And my enabled overlays are:
stm32mp1-hdmi.dtbo STM32MP1-OLinuXino Enable HDMI
stm32mp1-mmc3.dtbo Enable MMC3 extension
(So i tested both slots: on board, and through slot on the shield extension board, almost same results)
#9
STMP1 / An intern / EE student wanted ...
Last post by dry - July 03, 2026, 02:22:19 AMThis is probably a shot in the dark, but I'll shoot:
Seeking an intern/EE Student work in return for experience, reference(s), connections, not paid work.
Any EE student wants to work as intern for our start-up project/co?
In return, you get experience and a good reference. (In longer term, possible paid sub-contract work if this turns productive).
In brief, the scope would be making a custom extension board to plug ontop of Olimex's STMP157-OLinuXino-LIME2, into its GPIO connetors. There are requirements which should make this interesting.
Note that, while Olimex's board is open OSHW, the extension board will not be.
This should fit a Unni student with EE knowledge and preferably some basic PCB design experience, or enough ground knowledge to make it your first design, send to production, and then test/debug as needed.
Remote work is Ok, but You need to be in timezone such that we can chat between 9 am - 9 pm my time which is Melbourne, Australia.
If you interested, send me a message on the forum, just with your email and name - I'll ack and send you email to start the conversation.
Seeking an intern/EE Student work in return for experience, reference(s), connections, not paid work.
Any EE student wants to work as intern for our start-up project/co?
In return, you get experience and a good reference. (In longer term, possible paid sub-contract work if this turns productive).
In brief, the scope would be making a custom extension board to plug ontop of Olimex's STMP157-OLinuXino-LIME2, into its GPIO connetors. There are requirements which should make this interesting.
Note that, while Olimex's board is open OSHW, the extension board will not be.
This should fit a Unni student with EE knowledge and preferably some basic PCB design experience, or enough ground knowledge to make it your first design, send to production, and then test/debug as needed.
Remote work is Ok, but You need to be in timezone such that we can chat between 9 am - 9 pm my time which is Melbourne, Australia.
If you interested, send me a message on the forum, just with your email and name - I'll ack and send you email to start the conversation.
#10
A20 / Recurring SATA HD error on Lim...
Last post by mbosschaert - June 26, 2026, 07:02:03 PMOn my Lime2 RevL with latest olimex kernel I keep getting these errors frequently. The power supply of the board is 15W. I've replaced the SATA cable as in different fora this is suggested to be the cause. The WD 1TB 2.5" disk can be checked on another board and seems to be OK. As the enclosures have ventilation openings around the board it is unlikely caused by overheating.
Are there other Lime2 users experiencing the same disk failures and if so what was your solution?
Are there other Lime2 users experiencing the same disk failures and if so what was your solution?
Code Select
[ 1.863904] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 1.985543] ata1.00: ATA-10: WDC WD20SPZX-22UA7T0, 01.01A01, max UDMA/133
[ 1.985558] ata1.00: 3907029168 sectors, multi 16: LBA48 NCQ (depth 32)
[ 1.986234] ata1.00: configured for UDMA/133
[ 1.987153] scsi 0:0:0:0: Direct-Access ATA WDC WD20SPZX-22U 1A01 PQ: 0 ANSI: 5
[ 1.988597] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 1.988969] sd 0:0:0:0: [sda] 3907029168 512-byte logical blocks: (2.00 TB/1.82 TiB)
[ 1.988985] sd 0:0:0:0: [sda] 4096-byte physical blocks
[ 1.989111] sd 0:0:0:0: [sda] Write Protect is off
[ 1.989127] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
[ 1.989332] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 2.033446] ata1.00: exception Emask 0x10 SAct 0x1 SErr 0x10200 action 0xe frozen
[ 2.040997] ata1.00: irq_stat 0x00400000, PHY RDY changed
[ 2.046412] ata1: SError: { Persist PHYRdyChg }
[ 2.050961] ata1.00: failed command: READ FPDMA QUEUED
[ 2.056126] ata1.00: cmd 60/08:00:a8:88:e0/00:00:e8:00:00/40 tag 0 ncq dma 4096 in
res 40/00:00:a8:88:e0/00:00:e8:00:00/40 Emask 0x10 (ATA bus error)
[ 2.071679] ata1.00: status: { DRDY }
[ 2.075376] ata1: hard resetting link
[ 4.537398] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 4.563816] ata1.00: configured for UDMA/133
[ 4.563875] ata1: EH complete
[ 4.581413] ata1.00: exception Emask 0x10 SAct 0x2 SErr 0x10200 action 0xe frozen
[ 4.588926] ata1.00: irq_stat 0x00400000, PHY RDY changed
[ 4.594344] ata1: SError: { Persist PHYRdyChg }
[ 4.598898] ata1.00: failed command: READ FPDMA QUEUED
[ 4.604061] ata1.00: cmd 60/08:08:a8:88:e0/00:00:e8:00:00/40 tag 1 ncq dma 4096 in
res 40/00:08:a8:88:e0/00:00:e8:00:00/40 Emask 0x10 (ATA bus error)
[ 4.619613] ata1.00: status: { DRDY }
[ 4.623298] ata1: hard resetting link
[ 7.073395] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 7.074625] ata1.00: configured for UDMA/133
[ 7.074673] ata1: EH complete
[ 7.101461] sda: sda1
[ 7.118603] sd 0:0:0:0: [sda] Attached SCSI disk
[ 7.119786] sda: detected capacity change from 0 to 2000398934016
[ 7.120824] sda: detected capacity change from 0 to 2000398934016
[ 7.124345] Freeing unused kernel memory: 1024K
[ 7.133670] Run /init as init process
[ 7.133679] with arguments:
[ 7.133684] /init
[ 7.133688] with environment:
[ 7.133693] HOME=/
[ 7.133697] TERM=linux
[ 8.614356] axp20x-gpio axp20x-gpio: DMA mask not set
[ 8.621828] ata1.00: exception Emask 0x10 SAct 0x2 SErr 0x10200 action 0xe frozen
[ 8.622945] axp20x-gpio axp20x-gpio: AXP209 pinctrl and GPIO driver loaded
[ 8.629443] ata1.00: irq_stat 0x00400000, PHY RDY changed
[ 8.629460] ata1: SError: { Persist PHYRdyChg }
[ 8.639505] ata1.00: failed command: READ FPDMA QUEUED
[ 8.644749] ata1.00: cmd 60/08:08:00:00:00/00:00:00:00:00/40 tag 1 ncq dma 4096 in
res 40/00:08:00:00:00/00:00:00:00:00/40 Emask 0x10 (ATA bus error)
[ 8.660369] ata1.00: status: { DRDY }
[ 8.664137] ata1: hard resetting link
[ 11.177427] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 11.178773] ata1.00: configured for UDMA/133
[ 11.178872] sd 0:0:0:0: [sda] tag#1 UNKNOWN(0x2003) Result: hostbyte=0x00 driverbyte=0x08 cmd_age=2s
[ 11.178888] sd 0:0:0:0: [sda] tag#1 Sense Key : 0x5 [current]
[ 11.178900] sd 0:0:0:0: [sda] tag#1 ASC=0x21 ASCQ=0x4
[ 11.178919] sd 0:0:0:0: [sda] tag#1 CDB: opcode=0x28 28 00 00 00 00 00 00 00 08 00
[ 11.178933] blk_update_request: I/O error, dev sda, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
[ 11.189293] ata1: EH complete
[ 15.568456] ata1: limiting SATA link speed to 1.5 Gbps
[ 18.093501] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
[ 18.096975] ata1.00: configured for UDMA/133