June 13, 2024, 11:31:13 AM

SPI connection to iCE40-HX8K

Started by Sagar, January 30, 2023, 01:28:48 PM

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I was porting a Verilog code in which within the pcf file, pins P11 and P12 are configured within Verilog code as

set_io flash_io0 P12
set_io flash_io1 P11

I have tested demo code of flashing LEDs and it works fine. Clearly, by default FPGA is fetching it's logic from SPI flash since it's pcf files do not contain above type explicit connection of pins.

Can you please elaborate more on how the start of an FPGA bitstream execution from SPI memory works? Do I have to use above pin configuration while porting or I can skip it because such connection is hardwired?