ESP32 Gateway Rev. C Phy Ethernet not working emac: Timed out waiting for PHY

Started by juansezoh, March 25, 2020, 05:14:23 am

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juansezoh

Hi,

I have the similar error in Gateway ESP32 REV C,

E (1063) emac: Timed out waiting for PHY register 0x2 to have value 0x0007(mask 0xffff). Current value 0x0000
E (2064) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0(mask 0xfff0). Current value 0x0000

Can you tell me which example should I follow? What changes should be made about the Clock? About the gpio?

I am attentive, thank you very much.

Moderator edit: I've split this post in separate topic since it features different board and revision compared to the one in the original post. Also for better visibility.

LubOlimex

The ESP32-GATEWAY had major changes applied in revision D, so the software example for reivisons B and C is different compared to the newest versions. It is available here:

https://github.com/OLIMEX/ESP32-GATEWAY/tree/master/SOFTWARE/Hardware-revisions-B-or-C

If you are using Arduino you need to make sure the Olimex package is properly installed. The latest package takes care of board versions, refer to my screenshot:



If your Arduino package looks different re-install the Olimex package. If you have trouble installing the package follow this advice (despite that it is for ESP32-PoE boards):

https://www.olimex.com/Products/IoT/ESP32/_resources/Arudino-ESP32.txt
Technical support and documentation manager at Olimex

juansezoh

Hi, Thanks in advance, but the arduino examples in revision C how do I adjust them for ethernet to work ?, does the code need adjustments?

#ifdef ETH_CLK_MODE
#undef ETH_CLK_MODE
#endif
#define ETH_CLK_MODE    ETH_CLOCK_GPIO17_OUT

// Pin# of the enable signal for the external crystal oscillator (-1 to disable for internal APLL source)
#define ETH_POWER_PIN  -1

// Type of the Ethernet PHY (LAN8720 or TLK110)
#define ETH_TYPE        ETH_PHY_LAN8720

// I²C-address of Ethernet PHY (0 or 1 for LAN8720, 31 for TLK110)
#define ETH_ADDR        0

// Pin# of the I²C clock signal for the Ethernet PHY
#define ETH_MDC_PIN    15

// Pin# of the I²C IO signal for the Ethernet PHY
#define ETH_MDIO_PIN    2

LubOlimex

Technical support and documentation manager at Olimex

juansezoh

Hello, at this time the ETH started, however I am not sure about #define ETH_CLK_MODE ETH_CLOCK_GPIO17_OUT, does it work but in revision C this pin is disconnected, is correct this configuration? and GPIO0?, i am attentive, thanks.

LubOlimex

Technical support and documentation manager at Olimex

juansezoh

Hi everyone. In revision C, the ETH_CLK is connected to GPIO0 (I understand that from the schematic), however, the example only works if the ETH_CLK is defined like this #define ETH_CLK_MODE ETH_CLOCK_GPIO17_OUT, is this correct ?, or does it just work because GPIO17 does not have no effect and the ETH_CLK works with the external clock. Thanks.