I'm trying to analyze why Olimex ARM-USB-OCD is having trouble resetting my board and it looks like resistance through SRST is kinda high.
I'm testing with "ftdi_set_signal nSRST 0" and "ftdi_set_signal nSRST z" with OpenOCD.
When "0" resistance is ~70 Ohms.
When "z" resistance is ~120 kOhms.
This is probably why SRST gets pulled from 4.4v to ~1.8v when trying to pull low.
Same happens when testing TRST on the ARM-USB-OCD.
Does this make sense?
Is my ARM-USB-OCD defect?
Could I test or replace something on the ARM-USB-OCD?
At ARM I read: "Active Low output from RVI to the target system reset, with a 4.7kΩ pull-up resistor for de-asserted state.".
When I test with a 70 ohm resistor, the signal goes to ~2V, so this means that my target probably has unusually strong pull-up.
On the SRST line of ARM-UBS-OCD there is a 270 kOhm pull-down. This means that if there is unusually high pull-up on the reset line of the target there would be divider affect. Maybe don't use more than 10kOhm or 20kOhm pull up on the SRST line of the target.
Thanks for the info. I don't have a lot of JTAG experience and I'm just experimenting with an old board to get some practice.
In case other people find this post:
It looks like my measurements of the ARM-USB-OCD are accurate and nomimal.
The ARM-USB-OCD is not broken.
The board I'm testing, Seyeon Flexwatch-CAM100, has an unusually strong pull-up on the combined SRST/TRST pin.
To get the reset pull-down strong enough I use a buffered inverter to invert the SRST signal from the ARM-USB-OCD and drive a NPN transistor connected to the SRST signal of the board and GND.