ARM-USB-OCD not stable on Windows 7

Started by Richard, February 11, 2013, 12:46:37 pm

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Richard

Hello

My configuration is ARM-USB-OCD <==> LPC2148.
On Windows XP it works fine. But on Windows 7 it works only about every 5th time.

Has anyone a solution?
Below you find the results of two runs and the content of "lpc2148_flash.cfg"


Thanks for help.

Richard

======================================================================================================

C:\Users\ch_limar\Desktop>cd C:\OlimexODS\openocd-0.6.1\bin

C:\OlimexODS\openocd-0.6.1\bin>openocd-0.6.1.exe  -f ../scripts/interface/olimex-arm-usb-ocd.cfg -f C:/Users/ch_limar/Desktop/lpc2148_flash.cfg
Open On-Chip Debugger 0.6.1 (2012-10-07-10:34)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
adapter speed: 1500 kHz
Info : clock speed 1500 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.
Warn : NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.
dcc downloads are enabled
fast memory access is enabled
background polling: on
TAP: lpc2148.cpu (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
flash 'lpc2000' found at 0x00000000
cleared protection for sectors 0 through 26 on flash bank 0
erased sectors 0 through 26 on flash bank 0 in 0.156002s
===================================
auto erase enabled
auto unlock enabled
Warn : Bad value '00000001' captured during DR or IR scan:
Warn :  check_value: 0x00000009
Warn :  check_mask: 0x00000009
Error: JTAG error while reading cpsr
Warn : lpc2000 erase sectors returned 142
Error: failed erasing sectors 0 to 11
Runtime Error: C:/Users/ch_limar/Desktop/lpc2148_flash.cfg:40:
in procedure 'script'
at file "embedded:startup.tcl", line 58
in procedure 'program_device' called at file "C:/Users/ch_limar/Desktop/lpc2148_flash.cfg", line 55
in procedure 'flash' called at file "C:/Users/ch_limar/Desktop/lpc2148_flash.cfg", line 40

C:\OlimexODS\openocd-0.6.1\bin>PAUSE
Drücken Sie eine beliebige Taste . . .
=======================================================================================================


C:\Users\ch_limar\Desktop>cd C:\OlimexODS\openocd-0.6.1\bin

C:\OlimexODS\openocd-0.6.1\bin>openocd-0.6.1.exe  -f ../scripts/interface/olimex-arm-usb-ocd.cfg -f C:/Users/ch_limar/Desktop/lpc2148_flash.cfg
Open On-Chip Debugger 0.6.1 (2012-10-07-10:34)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
adapter speed: 1500 kHz
Info : clock speed 1500 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.
Warn : NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.
dcc downloads are enabled
fast memory access is enabled
background polling: on
TAP: lpc2148.cpu (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
flash 'lpc2000' found at 0x00000000
cleared protection for sectors 0 through 26 on flash bank 0
erased sectors 0 through 26 on flash bank 0 in 0.140401s
===================================
auto erase enabled
auto unlock enabled
Warn : Verification will fail since checksum in image (0xe1a00000) to be written to flash is different from calculated vector checksum (0xb9205f80).
Warn : To remove this warning modify build tools on developer PC to inject correct LPC vector checksum.
Warn : target reentered debug state, but not at the desired exit point: 0x60000004
Warn : lpc2000 returned 150
Error: error writing to flash at address 0x00000000 at offset 0x00000000
Runtime Error: C:/Users/ch_limar/Desktop/lpc2148_flash.cfg:40:
in procedure 'script'
at file "embedded:startup.tcl", line 58
in procedure 'program_device' called at file "C:/Users/ch_limar/Desktop/lpc2148_flash.cfg", line 55
in procedure 'flash' called at file "C:/Users/ch_limar/Desktop/lpc2148_flash.cfg", line 40

C:\OlimexODS\openocd-0.6.1\bin>PAUSE
Drücken Sie eine beliebige Taste . . .
=======================================================================================================
lpc2148_flash.cfg:
------------------

# NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal

source [find target/lpc2xxx.cfg]

# parameters:
# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000

proc setup_lpc2148 {core_freq_khz adapter_freq_khz} {
   # 500kB flash and 32kB SRAM
   # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
   setup_lpc2xxx lpc2148 "0x3f0f0f0f 0x4f1f0f0f" 0x7d000 lpc2000_v2 0x8000 $core_freq_khz $adapter_freq_khz
}

proc init_targets {} {
   # default to core clocked with 12MHz crystal
   echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
   
   # setup_lpc2148 <core_freq_khz> <adapter_freq_khz>
   setup_lpc2148 12000 1500
}

proc program_device () {
  # halt the processor
  halt
  wait_halt
  # write file to flash memory
  arm7_9 dcc_downloads enable
  arm7_9 fast_memory_access enable
  sleep 100
  poll
  flash probe 0
  sleep 100
  flash protect 0 0 26 off
  sleep 100
  flash erase_sector 0 0 26
  sleep 100

  echo                            ===================================
  flash write_image erase unlock "C:/Users/ch_limar/Desktop/Br403F10j.hex" 0
  echo                            ===================================
  echo =
  sleep 100
  #start execution of the program just downladed
  #reset run
  sleep 100
  init
  reset init
  #exit OpenOCD
  shutdown
}

init
reset init
program_device ()
=======================================================================================================