December 12, 2019, 05:31:48 am

JTAG interface?

Started by grmpf, August 24, 2019, 05:37:42 pm

Previous topic - Next topic

grmpf

Does the Teres-I support JTAG hardware debugging?. I.e. is there a possibility to connect an adapter in order to attach it to some JTAG HW debugger (Segger, OpenOCD,..)?

Regards
Jörg

grmpf

Ok, apparently there is no "sure, yesss!". I digged a little bit into the schematics and the device tree. Pins PB0..PB3 seem to be jtag0 MS,CK,DO,DI. What I can read from the schematics they are routed to the main board CON4 lines 16..13. Is CON4 connected to anything?

There is also a "JTAGSEL0" PIN on the Allwinner A64 which is connected to the power button board. What purpose is it for?

The jtag1 pins are used for the micro SD card. Those lines have some pullup resistors - does anybody know if these make the use for jtag impossible?

For the Teres-II mainboard that may come at some time in future I vote for a special JTAG breakout connector.

LubOlimex

The hardware connection would be the easy part....

I haven't seen someone succeed in the JTAG debugging of A64.
Technical support and documentation manager at Olimex

grmpf

Too bad :( the A64 manual in fact does not tell too much about JTAG either.