A10 OLinuXino LIME - Differences between revisions A, B and C

Started by dj9pz, July 14, 2014, 05:13:23 pm

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dj9pz

Hello,

I just made a quick comparison between Rev A, B and C of A10 OLinuXino LIME and noticed that the Rev C now (optionally) connects A10 pin PC16/NWP via R76 to pin 19 #WP of NAND. What is the reason for this change?

I added a (supported) 8GB NAND to my A10 OLinuXino LIME Rev A (incl. 3 10k resistors and 3 100nF capacitors), but I still have problems accessing it under Linux (current linux-sunxi kernel 3.4.90+). The NAND is correctly identified during boot, but process "nandd" uses all CPU capacity and accessing the NAND using "nand-part" hangs... A mostly similar kernel (A20 instead of A10, same git revision) works flawlessly to access the 8GB NAND of a Cubietruck...

Thanks in advance!

Arnd, DJ9PZ / AB2QP