Print Page - Accessing GPIO pins in latest rev.L Borad

Title: Accessing GPIO pins in latest rev.L Borad
Post by: Suvhm on June 17, 2020, 08:09:08 PM

Hello team,

I had used GPIO 67 in my application for rev.G board it was working fine, but when i try to port the same application on latest revision of board(rev.L) it through an error that device is busy.

Steps :

Tried to expose the control of gpio 67 from kernel to user space (echo 67 > /sys/class/gpio/export)
Trying to set the direction, but unfortunately in the above step it shows device is busy

It seems GPIO 67 is already taken by some module/driver.

Quoteroot@ssniotr:~# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-287, parent: platform/1c20800.pinctrl, 1c20800.pinctrl:
gpio-67 ( |ahci-5v ) out hi
gpio-80 ( |reset ) out hi ACTIVE LOW
gpio-81 ( |usb0-vbus ) out lo
gpio-192 ( |sysfs ) out lo
gpio-193 ( |sysfs ) out lo
gpio-225 ( |cd ) in lo IRQ ACTIVE LOW
gpio-226 ( |a20-olinuxino-lime2:) out hi
gpio-227 ( |usb2-vbus ) out hi
gpio-228 ( |usb0_id_det ) in hi IRQ
gpio-229 ( |usb0_vbus_det ) in lo IRQ
gpio-230 ( |usb1-vbus ) out hi

here we can check some "ahci-5v" is taken the 67 no GPIO.

Can any one help me to understand what all changes had been done in latest rev.l board in GPIO perspective.

I appreciate your support here :)

Regards,
suvhm

Title: Re: Accessing GPIO pins in latest rev.L Borad
Post by: LubOlimex on July 06, 2020, 03:32:26 PM

What board is that?

Title: Re: Accessing GPIO pins in latest rev.L Borad
Post by: pac on October 30, 2020, 06:01:05 PM

Hi all,
I have the same problem on an A20 LIME using the latest images.
How can I get available the GPIO 67 (PC3) ?
Thanks in advance
Paolo

Title: Re: Accessing GPIO pins in latest rev.L Borad
Post by: JohnS on October 30, 2020, 10:30:18 PM

PC3 looks to be in use already, in which case you can't.

John

Title: Re: Accessing GPIO pins in latest rev.L Borad
Post by: LubOlimex on November 02, 2020, 09:10:35 AM

1. By default PC3 is SATA-PWR-EN, this is set by the hardware and using PC3 for GPIO is not recommended no matter the Linux version! Turning it on an off would influence the power circuit and there are capacitors that get powered and un-powered timer you toggle PC3. This is dangerous! You can change the SATA-PWR-EN to PB8 pin by changing the state of the jumper PC3/PB8 to position PB8. This requires cutting between the pads of the original position and soldering the pads of the new position together. Once you have freed PC3 - you can use it for GPIO. Refer to the attachment that highlight the part of the schematic with PC3/PB8. Now the big problem would be if you also need PB8...

2. You need to remove the definition that sets PC3 for SATA power in the sun7i-a20-olinuxino-lime.dts, check it here:

https://github.com/OLIMEX/linux-olimex/blob/release-20201029-v5.8.16/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts

Remove:

&reg_ahci_5v {
gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
status = "okay";
};

Now you are free to define and use PC3 for GPIO!

Olimex Support Forum

OLinuXino Android / Linux boards and System On Modules => A20 => Topic started by: Suvhm on June 17, 2020, 08:09:08 PM