Olimex Support Forum

OLinuXino Android / Linux boards and System On Modules => A20 => Topic started by: chradev on April 02, 2016, 11:29:56 PM

Title: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 02, 2016, 11:29:56 PM
Hi to All,

I have just received from Olimex 2 boards A20-OLinuXino-LIME2-eMMC with new HW rev. E.
I have 2 boards A20-OLinuXino-LIME2-4GB with old HW rev. C.
The HW setup includes also USB-WiFi (MOD-WIFI-R5370) and USB-LAN adapters and SATA SSD.

SW is highly customized by me Armbian 5.07 (latest), U-Boot v2015.10 and Linux kernel 3.4.111.
The Armbian build includes also pmount, dnsmasq, nginx-full (DNS & DHCP and Web servers) and RPI Monitor customized for Allwinner A20 boards with AXP209 PMU. Configuration is also heavily customized. Igor Pecovnik's LDO3/LDO4 patch for U-Boot is present but disabled.

The main differences in new HW rev D and E compared to rev C are:

New rev. E Lime2 boards have nothing written on NAND but run immediately from SD prepared and working fine on old rev. C once.

Some of my first observations are (measures on Lime2 rev. E vs. rev. C with no extra CPU Load):
Above observations are based only on brief tests and more detailed once will be done later.

Unfortunately, there is no information on how to switch from default NAND to eMMC option which is important to me so any help is welcome.

EDIT: It is not written on Olimex site and A20-OLinuXino-LIME2 user's manual but as I can see on the board and schematics probably there will be 3 board options:
which mean that NAND driver is right to fail because of chip luck and only U-Boot and kernel SW support has to be added for the second SD card (SDC2).

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 04, 2016, 10:50:35 AM
Hi to All,

Find my comparison tests of power consumption, battery life and chip temperature characteristics for A20-Olinuxino-Lime2 HW rev. C (-4GB) and E (-eMMC).


Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 04, 2016, 05:32:09 PM
Hi to All,

Next my step is to test eMMC. The details about it was published on:
http://forum.armbian.com/index.php/topic/853-armbian-customization/#entry7265 (http://forum.armbian.com/index.php/topic/853-armbian-customization/#entry7265)

Any help is welcome

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: LubOlimex on April 07, 2016, 11:09:40 AM
Hey,

Can you describe your testing setup?

45 degrees C doesn't occur as an alarming temperature for the PMU. It seems completely fine to me.

Best regards,
Lub/OLIMEX
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 07, 2016, 03:20:17 PM
Hi Lubomir,

Fist of all I have temperature problem with 2x A20-Olinuxino-Lime2-4GB (rev. C) boards and send an e-mail with all details about it to your support.

You can also take a look on all data via following link: status.html (http://status.html)
Currently the system is with open box and w/o load (25 degree Celsius room temperature) - PMU temperature is 44 degree Celsius.

Yes 40 degree Celsius is not a problem in case of system load. But this temperatures are measured with no CPU, IO, Network load - system is simply running only its background processes.

My configuration except A20-Olinuxino-Lime2-4GB board itself include MOD-WIFI-R5370, USB-ETHERNET-AX88772B and 60 GB SATA SSD (model V60).
The board is powered by BATTERY-LIPO6600mAh, SY0605E and from USB OTG.
There is ALUMINIUM-HEATSINK-20x20x6MM is mounted on the CPU chip.
It is planned the board to be mounted in A10-OLinuXino-LIME-BOX.
Above configuration should work in 24/7 regime.

Under the most optimistic variant (no extra CPU / NAND / SD / SSD load and network traffic, battery is full and board is powered from DC-IN 5V at mean 500 mA consumption and mean 200 mA or 1 W via PMU) the PMU temperature is:
* more than 42 degree Celsius if the board is outside the box
* more than 49 degree Celsius if the board is into the box
In case of no external power (consumption from battery) or at battery charring (~1000 mA consumption from DC-IN and up to 600 mA charge current) the temperatures goes close to 50 degree Celsius (the board is outside the box).
In case of powering from USB OTG and the board is into the box the PMU temperature goes above 52 degree Celsius when the test was discontinued.

For bettering PMU temperature regime I put on it a small heat sink but the temperatures decreased with 2-3 degree Celsius.
Both A20-Olinuxino-Lime2-4GB boards have similar behavior (as described above).

Mean while I have received 2x A20-Olinuxino-Lime2-eMMC boards and noticed that the PMU temperature is much lower (28 vs. 42 degree Celsius). For example when Lime2-eMMC board is in box without heat sinks and with all above peripherals and at battery charge via DC-IN both CPU and PMU temperatures is close but under 40 degree Celsius.

Temperatures and other PMU characteristics  are measured using RPI Monitor (on Armbian 5.07 with U-Boot v2015.10, kernel 3.4.111 sun7 and Debian 8 Jessie) customized to work with A20 CPU and AXP209 PMU chip set. For more details take a look on following file Lime2-rev-C-E-comp.pdf (http://lime2-rev-c-e-comp.pdf).

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: LubOlimex on April 07, 2016, 03:57:14 PM
One thing is not clear - all the tests on both boards are performed using the same microSD card with the same image, is this correct assumption? (I guess, Armbian 5.07 with U-Boot v2015.10, kernel 3.4.111 sun7 and Debian 8 Jessie).

Best regards,
Lub/OLIMEX
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 07, 2016, 06:00:06 PM
Yes, it is correct. I use one and the same image for both boards for battery and temperature tests.
It is customized by me Armbian 5.07 with U-Boot v2015.10, kernel 3.4.111-sun7 and Debian 8 Jessie.

It supports NAND on A20-Olinuxino-Lime2-4GB board but does not currently support eMMC on Lime2-eMMC board (I am working on).

As I wrote to the support A20-Olinuxino-Lime2-4GB boards temperature problem is probably in soldering.
They are both soldered either manually or re-soldered and probably heat contact with the board is lost.

The other problem I have is with eMMC support on Lime2-eMMC boards but it is published on other threads:
https://www.olimex.com/forum/index.php?topic=5184.msg21560#msg21560 (https://www.olimex.com/forum/index.php?topic=5184.msg21560#msg21560)
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7265 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7265) - for kernel 3.4
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7277 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7277) - for kernel 4.2

I follow the forum threads and other fex and dts files but eMMC is not recognized correctly by the kernel so it could be very nice to give me some directions where my fault is.
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: LubOlimex on April 08, 2016, 02:14:03 PM
Hey,

I don't recommend you to perform any conclusive tests with unofficial images. The values in the scripts and the different u-boot versions might cause such temperature differences.

The NAND is in TQFP package and eMMC is in BGA package (no way to see any soldering below it) – you can't objectively compare the soldering between the boards.

It is normal to have work done by hand. Each board and each soldering gets evaluated by a technician. If the technician decides that the PCB placing machines didn't do a soldering properly he might advice an employee to re-do any soldering by hand to ensure that everything would work fine. It is more important for us to sell well-tested and well-working boards. We are not into pretty boards.

Try with these two images for LIME2:

1) LIME2 with NAND, 2015.10 mainline u-boot, sunxi kernel, Jessie FS, image release #5: https://www.olimex.com/wiki/images/4/46/A20-lime2_mainline_uboot_GMAC_master_sunxi_kernel_3.4.103_jessie_NAND_rel_5.torrent

2) LIME2 with eMMC, 2015.10 mainline u-boot, sunxi kernel, Jessie FS, image release #5: https://www.olimex.com/wiki/images/1/14/A20-lime2_mainline_uboot_GMAC_master_sunxi_kernel_3.4.103_jessie_emmc_rel_5.torrent

There are NAND/eMMC install scripts inside.

We are working on the repository and the instructions for the new releases. Keep an eye here: https://github.com/OLIMEX/OLINUXINO/tree/master/SOFTWARE/A20/A20-build-3.4.103-release-2

Best regards,
Lub/OLIMEX
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 08, 2016, 03:08:09 PM
Thanks Lubomir,

I will do the tests with pointed images and will report the results as soon as I have them.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 08, 2016, 05:23:45 PM
Hi to All

My first test was with 20-lime2_mainline_uboot_GMAC_master_sunxi_kernel_3.4.103_jessie_emmc_rel_5 image on A20-OLinuXino-Lime2-eMMC.
It boots successfully and eMMC is recognized by both U-Boot:

U-Boot 2015.10-dirty (Apr 04 2016 - 15:36:04 +0300) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0 (SD), SUNXI SD/MMC: 1

and kernel

root@A20-OLinuXino:~# dmesg | grep mmc
[    0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10
[    2.419666] [mmc-msg] sw_mci_init
[    2.428737] [mmc-msg] MMC host used card: 0x5, boot card: 0x5, io_card 0
[    2.443411] [mmc-msg] sdc0 set round clock 400000, src 24000000
[    2.457586] [mmc-msg] sdc0 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.474802] [mmc-msg] sdc0 Probe: base:0xf0146000 irq:64 sg_cpu:f0148000(4fc00000) ret 0.
[    2.482713] [mmc-msg] sdc0 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.502233] [mmc-msg] sdc0 power on
[    2.514035] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.528267] [mmc-msg] sdc0 set round clock 400000, src 24000000
[    2.539215] [mmc-msg] sdc2 set round clock 400000, src 24000000
[    2.553378] [mmc-msg] sdc2 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.570617] [mmc-msg] sdc2 Probe: base:0xf014a000 irq:66 sg_cpu:f014c000(4fc01000) ret 0.
[    2.583400] [mmc_pm]: failed to fetch sdio card configuration!
[    2.607582] [mmc-err] smc 0 err, cmd 52,  RTO
[    2.625998] [mmc-err] smc 0 err, cmd 52,  RTO
[    2.641493] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.664085] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.714030] [mmc_pm]: No sdio card, please check your config !!
[    2.730527] [mmc-err] smc 0 err, cmd 5,  RTO
[    2.743054] [mmc-err] smc 0 err, cmd 5,  RTO
[    2.759149] [mmc-err] smc 0 err, cmd 5,  RTO
[    2.776846] [mmc-err] smc 0 err, cmd 5,  RTO
[    2.807555] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.831321] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    2.854521] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.049631] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing SD-HS(SDR25) dt B
[    3.067334] [mmc-msg] sdc0 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 1 timing SD-HS(SDR25) dt B
[    3.081913] [mmc-msg] sdc0 set round clock 42857143, src 600000000
[    3.135274] Waiting for root device /dev/mmcblk0p2...
[    3.148865] [mmc-msg] sdc0 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 4 timing SD-HS(SDR25) dt B
[    3.162805] mmc0: new high speed SDHC card at address 0007
[    3.172211] mmcblk0: mmc0:0007 SD04G 3.70 GiB
[    3.180095]  mmcblk0: p1 p2
[    3.191648] [mmc-msg] sdc2 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.203075] [mmc-msg] sdc2 power on
[    3.227434] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.241728] [mmc-msg] sdc2 set round clock 400000, src 24000000
[    3.259865] EXT3-fs (mmcblk0p2): error: couldn't mount because of unsupported optional features (240)
[    3.279687] EXT2-fs (mmcblk0p2): error: couldn't mount because of unsupported optional features (240)
[    3.317025] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    3.328460] [mmc-err] smc 2 err, cmd 52,  RTO
[    3.347189] [mmc-err] smc 2 err, cmd 52,  RTO
[    3.359911] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.391204] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.407118] [mmc-err] smc 2 err, cmd 8,  RTO
[    3.416110] [mmc-err] smc 2 err, cmd 5,  RTO
[    3.424480] [mmc-err] smc 2 err, cmd 5,  RTO
[    3.432921] [mmc-err] smc 2 err, cmd 5,  RTO
[    3.441671] [mmc-err] smc 2 err, cmd 5,  RTO
[    3.450256] [mmc-err] smc 2 err, cmd 55,  RTO
[    3.458859] [mmc-err] smc 2 err, cmd 55,  RTO
[    3.467437] [mmc-err] smc 2 err, cmd 55,  RTO
[    3.476000] [mmc-err] smc 2 err, cmd 55,  RTO
[    3.488780] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.507310] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.525099] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.542895] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.563139] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.598711] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    3.631359] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 8 timing LEGACY(SDR12) dt B
[    3.647376] [mmc-err] smc 2 err, cmd 8,  EBE
[    3.654870] [mmc-err] In data read operation
[    3.664174] [mmc-msg] found data error, need to send stop command
[    3.674954] [mmc-err] sdc 2 send stop command failed
[    3.684548] mmc1: unexpected status 0x400800 after switch
[    3.698226] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 4 timing LEGACY(SDR12) dt B
[    3.716210] mmc1: switch to highspeed failed
[    3.729224] [mmc-msg] sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 4 timing LEGACY(SDR12) dt B
[    3.744046] [mmc-msg] sdc2 set round clock 25000000, src 600000000
[    3.814407] [mmc-msg] sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 8 timing LEGACY(SDR12) dt B
[    3.829178] [mmc-err] smc 2 err, cmd 8,  EBE
[    3.836673] [mmc-err] In data read operation
[    3.845975] [mmc-msg] found data error, need to send stop command
[    3.855984] [mmc-err] sdc 2 send stop command failed
[    3.871035] [mmc-msg] sdc2 set ios: clk 25000000Hz bm PP pm ON vdd 3.3V width 4 timing LEGACY(SDR12) dt B
[    3.885984] mmc1: new MMC card at address 0001
[    3.894828] mmcblk1: mmc1:0001 P1XXXX 3.60 GiB
[    3.904988] mmcblk1boot0: mmc1:0001 P1XXXX partition 1 16.0 MiB
[    3.916739] mmcblk1boot1: mmc1:0001 P1XXXX partition 2 16.0 MiB
[    3.925876]  mmcblk1: p1
[    3.938429] Dev Sunxi softw311 mmcblk1boot1 magic does not match for MBR 1:
[    3.952938] Dev Sunxi softw311 mmcblk1boot1 magic does not match for MBR 2:
[    3.967464] Dev Sunxi softw311 mmcblk1boot1 magic does not match for MBR 3:
[    3.981935] Dev Sunxi softw311 mmcblk1boot1 magic does not match for MBR 4:
[    3.998104] Dev Sunxi softw311 mmcblk1boot1 header bad for all MBR copies, MBR corrupted or not present.
[    4.014290] Dev Sunxi softw411 mmcblk1boot1 magic does not match for MBR 1:
[    4.029497] Dev Sunxi softw411 mmcblk1boot1 magic does not match for MBR 2:
[    4.044744] Dev Sunxi softw411 mmcblk1boot1 magic does not match for MBR 3:
[    4.059955] Dev Sunxi softw411 mmcblk1boot1 magic does not match for MBR 4:
[    4.076236] Dev Sunxi softw411 mmcblk1boot1 header bad for all MBR copies, MBR corrupted or not present.
[    4.089516]  mmcblk1boot1: unknown partition table
[    4.104386] Dev Sunxi softw311 mmcblk1boot0 magic does not match for MBR 1:
[    4.118899] Dev Sunxi softw311 mmcblk1boot0 magic does not match for MBR 2:
[    4.133387] Dev Sunxi softw311 mmcblk1boot0 magic does not match for MBR 3:
[    4.147889] Dev Sunxi softw311 mmcblk1boot0 magic does not match for MBR 4:
[    4.163948] Dev Sunxi softw311 mmcblk1boot0 header bad for all MBR copies, MBR corrupted or not present.
[    4.180001] Dev Sunxi softw411 mmcblk1boot0 magic does not match for MBR 1:
[    4.194321] Dev Sunxi softw411 mmcblk1boot0 magic does not match for MBR 2:
[    4.208641] Dev Sunxi softw411 mmcblk1boot0 magic does not match for MBR 3:
[    4.222959] Dev Sunxi softw411 mmcblk1boot0 magic does not match for MBR 4:
[    4.239011] Dev Sunxi softw411 mmcblk1boot0 header bad for all MBR copies, MBR corrupted or not present.
[    4.252117]  mmcblk1boot0: unknown partition table
[    4.700470] systemd-gpt-auto-generator[73]: Failed to determine partition table type of /dev/mmcblk0: Input/output error
[    6.692958] systemd[1]: Expecting device dev-mmcblk0p1.device...
[   32.047403] EXT4-fs (mmcblk1p1): mounted filesystem with ordered data mode. Opts: (null)

lsblk command prints:

root@A20-OLinuXino:~# lsblk
NAME         MAJ:MIN RM  SIZE RO TYPE MOUNTPOINT
sda            8:0    0 55.9G  0 disk
|-sda1         8:1    0   50G  0 part
`-sda2         8:2    0  5.9G  0 part
mmcblk1boot0 179:16   0   16M  1 disk
mmcblk1boot1 179:24   0   16M  1 disk
mmcblk0      179:0    0  3.7G  0 disk
|-mmcblk0p1  179:1    0   16M  0 part /boot
`-mmcblk0p2  179:2    0  1.9G  0 part /
mmcblk1      179:8    0  3.6G  0 disk
`-mmcblk1p1  179:9    0  3.6G  0 part

and 'ls -la /dev/mmc*':

root@A20-OLinuXino:~# ls -la /dev/mmc*
brw-rw---- 1 root disk 179,  0 Jan  1 00:03 /dev/mmcblk0
brw-rw---- 1 root disk 179,  1 Jan  1 00:03 /dev/mmcblk0p1
brw-rw---- 1 root disk 179,  2 Jan  1 00:03 /dev/mmcblk0p2
brw-rw---- 1 root disk 179,  8 Jan  1 00:03 /dev/mmcblk1
brw-rw---- 1 root disk 179, 16 Jan  1 00:03 /dev/mmcblk1boot0
brw-rw---- 1 root disk 179, 24 Jan  1 00:03 /dev/mmcblk1boot1
brw-rw---- 1 root disk 179,  9 Jan  1 00:03 /dev/mmcblk1p1

Where devices /dev/mmcblk1boot0 and /dev/mmcblk1boot1 of type 'disk' having size of 16MB and marked as RO are strange.
'fdisk /dev/mmcblk1' command reports for a single partition on eMMC:

Disk /dev/mmcblk1: 3.6 GiB, 3867148288 bytes, 7553024 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0x0d19330d

Device         Boot Start     End Sectors  Size Id Type
/dev/mmcblk1p1       2048 7553023 7550976  3.6G 83 Linux


Next test done is for read and write performance:

root@A20-OLinuXino:~# dd if=/dev/zero of=/media/olimex/2c2213d0-558b-4f7c-ae68-db5bc30672b6/1GBfile bs=1M count=1024
1024+0 records in
1024+0 records out
1073741824 bytes (1.1 GB) copied, 98.7103 s, 10.9 MB/s
root@A20-OLinuXino:~# dd of=/dev/null if=/media/olimex/2c2213d0-558b-4f7c-ae68-db5bc30672b6/1GBfile
2097152+0 records in
2097152+0 records out
1073741824 bytes (1.1 GB) copied, 87.9607 s, 12.2 MB/s

reporting for 10.9 and 12.2 MB/s performance at writing to and reading from eMMC of 1GB file.

60GB SSD device connected to SATA is recognized but not auto-mounted so after manual mount the speed test gives:

root@A20-OLinuXino:~# dd if=/dev/zero of=/mnt/1GBfile bs=1M count=1024
1024+0 records in
1024+0 records out
1073741824 bytes (1.1 GB) copied, 24.1925 s, 44.4 MB/s
root@A20-OLinuXino:~# dd of=/dev/null if=/mnt/1GBfile
2097152+0 records in
2097152+0 records out
1073741824 bytes (1.1 GB) copied, 16.2533 s, 66.1 MB/s


Ethernet interface is not set to auto so 'ifup eth0' command has to be issued:

root@A20-OLinuXino:~# ifup eth0
<6>sunxi_gmac: probed
[  179.373228] sunxi_gmac: probed
<6>eth0: PHY ID 001cc912 at 1 IRQ 0 (sunxi_gmac-0:01) active
[  179.381683] eth0: PHY ID 001cc912 at 1 IRQ 0 (sunxi_gmac-0:01) active
<6>PHY: sunxi_gmac-0:01 - Link is Up[  181.392328] PHY: sunxi_gmac-0:01 - Link is Up<c> - 1000/Full - 1000/Full<c>

reporting that connection speed is 1GB at full duplex.
test with scp command to transfer 1GB file from eMMC to Linux VM on i7PC via DLink DIR-860L router with GBit switch gives:

root@chr-vm-yocto:/data/armbian-dev/userpatches/dts/rrddata# scp root@192.168.1.254:/media/olimex/2c2213d0-558b-4f7c-ae68-db5bc30672b6/1GBfile .
root@192.168.1.254's password:
1GBfile                                          100% 1024MB   8.1MB/s   02:07   

the same test using the 1GB file from SSD reports:

root@chr-vm-yocto:/data/armbian-dev/userpatches/dts/rrddata# scp root@192.168.1.254:/mnt/1GBfile .
root@192.168.1.254's password:
1GBfile                                          100% 1024MB   8.5MB/s   02:01   

which is similar speed without matter that file read is 5 times faster so probably is limited by network.
Similar speeds are achieved if Lime2-eMMC is connected directly to my MACBook Pro.

More tests have to be done for measuring Ethernet speed and proving if the connection is really GBit.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 09, 2016, 06:56:06 PM
Hi Lubomir,

I try to build kernel using fix_gigabit_phy.patch but file to patch (drivers/net/phy/phy.c) is completely different in all source trees I am using.
Searching for the staff to patch I fount such in the file drivers/net/phy/phy_device.c.

Is it some technical issue or I am missing something?

EDIT: it is patch for u-boot.

Best ragards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: LubOlimex on April 11, 2016, 10:12:56 AM
Hey,

The step-by-step instructions and the exact sources we used are now also available at GitHub. Refer to this document:

https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/build_instructions_A20_Olimex_kernel_3.4.103%2B_Jessie_rel_2_with_camera_support.txt

This is also a helpful read:

https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/usage_and_image_description_A20-Olimex_kernel_3.4.103%2B_Jessie_rel_2_with_camera_support.txt

Best regards,
Lub/OLIMEX
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 11, 2016, 02:26:16 PM
Thanks Lubomir,

I have already soled my problems:
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7491 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7491)

Even ported GBit fix patch and eMMC support for A20-Olinuxino-Lime2-eMMC to Armbian 5.07

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 14, 2016, 09:33:10 AM
Hi to All,

I have finally succeeded to install and customize RPI Monitor 2.10 in Armbian 5.07 with Kernel 4.4.6 and run it on A20-Olinuxino-Lime2-eMMC.

You can find the report of the series of thermal and power tests done with and without CPU and Network load on the following post:
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7724 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7724)

The good news is that there are no hangs while testing even the temperatures of both CPU and PMU chips go up to 58°C.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 15, 2016, 01:52:35 PM
Hi to All,

You can find a short summary of the thermal and power tests on Lime2-eMMC:
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7762 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7762)

It is good to mention that the peak network speed of 980Mbps measured is a quite well test result.
A good test results are measured SATA SSD R/W speeds of 90MB/s and 48MB/s respectively as well.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on April 26, 2016, 06:04:46 PM
Hi to All,

These days I get HDMI LCD monitor and after connecting it to Lime2 board find following:

Temperatures are measured with CPU aluminum heat sink and the board in open air.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on May 31, 2016, 01:42:34 AM
Hello,

I have a rev. E lime2-emmc and suffer from the problems you mention.
I am new to the sbc scene. I have update/upgrade my installation using:
- Armbian_5.10_Lime2_Debian_jessie_4.5.2.raw
- a20-lime2_mainline_uboot_GMAC_master_sunxi_kernel_3.4.103_jessie_emmc_rel_5.img

I installed the "dev" packages from http://www.armbian.com/kernel.
I copy files to /dev/null just in case my sd card is too slow.
Nothing works. 13MB/sec is the max i can transfer on gbe. Other machines on the network can do at least 60MB/sec.
I don't understand how I can absorb the changes that were made as it is stated they have been applied (somewhere).
Do I have to patch everything myself? I would have thought an update/upgrade would have pulled the changes in for me.
Can someone point out what i am misunderstanding?

Thanks in advance.

Jon.

P.s. Great community you have here. Hoping to be able to contribute some code...
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on May 31, 2016, 09:45:26 AM
Hi Jon,

You probably talk about GBit Ethernet problem.

The patch sunxi-gmac-fix.patch is added to Armbian repository (for next branch only) but is disabled.

If you want to fix GBit Ethernet problem in Lime2-eMMC board you have to build at least U-Boot yourself.
I do not test dev branch but as it uses the same U-Boot revision it has to be patched as well.

The same is for eMMC support (add-emmc-lime2.patch) it is added to to both next and dev branches but disabled.

Of course, the get eMMC support mainline kernel has to be patched as well (add-emmc-lime2.patch).
It is added to Armbian repository (for next branch only) but disabled.

Unfortunately, Armbian do not support out of the box Lime2 rev. E boards (incl. eMMC variant).
That is way you have to build at least the U-Boot and Kernel or better whole Armbian image.

You can read my post http://forum.armbian.com/index.php/topic/853-armbian-customization/ (http://forum.armbian.com/index.php/topic/853-armbian-customization/).
There I have described all my way to get stable and fully functional Lime2-eMMC system based on Armbian next.

In case of interest I can publish all my customization staff but its usage needs of relevant experience.

As a beginning you can try U-boot and Kernel from my custom build:
https://drive.google.com/file/d/0B7hed-DxVjhoYmhNMDhNbkZYVUE (https://drive.google.com/file/d/0B7hed-DxVjhoYmhNMDhNbkZYVUE)

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on May 31, 2016, 01:22:09 PM
Thanks for the help Chris I will give it a try.
Yes mainly gbit but also emmc.
I just ordered an SSD so I can play with that as well.
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on June 02, 2016, 12:21:45 AM
Hi to all,

It looks like the gmac patch is not working.

https://github.com/igorpecovnik/lib/blob/master/patch/u-boot/u-boot-next/sunxi-gmac-fix.patch.disabled

"
cpu_eth_init is no longer called for dm enabled eth drivers, this
was causing the sunxi gmac eth controller to no longer work in u-boot.

This commit fixes this by moving the gpio setup to gpio_init() and by
calling the clock, reset and pinmux setup function from s_init().

Note that the mdelay is dropped as the phy gets enabled much earlier
now, so it is no longer needed.

Signed-off-by: Hans de Goede <hdegoede at redhat.com>
---
arch/arm/cpu/armv7/sunxi/board.c            | 32 +++++------------------------
arch/arm/include/asm/arch-sunxi/sys_proto.h |  6 +++++-
board/sunxi/gmac.c                          | 14 +------------
3 files changed, 11 insertions(+), 41 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index e80785b..9a97049 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -100,6 +100,10 @@ static int gpio_init(void)
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif

+#ifdef CONFIG_MACPWR
+   gpio_request(CONFIG_MACPWR, "macpwr");
+   gpio_direction_output(CONFIG_MACPWR, 1);
+#endif
   return 0;
}

@@ -152,6 +156,7 @@ void s_init(void)
   timer_init();
   gpio_init();
   i2c_init_board();
+   eth_init_board();
}

#ifdef CONFIG_SPL_BUILD
@@ -259,30 +264,3 @@ void enable_caches(void)
   dcache_enable();
}
#endif
-
-#ifdef CONFIG_CMD_NET
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-int cpu_eth_init(bd_t *bis)
-{
-   __maybe_unused int rc;
-
-#ifdef CONFIG_MACPWR
-   gpio_request(CONFIG_MACPWR, "macpwr");
-   gpio_direction_output(CONFIG_MACPWR, 1);
-   mdelay(200);
-#endif
-
-#ifdef CONFIG_SUNXI_GMAC
-   rc = sunxi_gmac_initialize(bis);
-   if (rc < 0) {
-      printf("sunxi: failed to initialize gmac\n");
-      return rc;
-   }
-#endif
-
-   return 0;
-}
-#endif
diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h b/arch/arm/include/asm/arch-sunxi/sys_proto.h
index 9df3744..a373319 100644
--- a/arch/arm/include/asm/arch-sunxi/sys_proto.h
+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h
@@ -24,6 +24,10 @@ void sdelay(unsigned long);
void return_to_fel(uint32_t lr, uint32_t sp);

/* Board / SoC level designware gmac init */
-int sunxi_gmac_initialize(bd_t *bis);
+#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC
+void eth_init_board(void);
+#else
+static inline void eth_init_board(void) {}
+#endif

#endif
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 4e222d8..69eb8ff 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -6,7 +6,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>

-int sunxi_gmac_initialize(bd_t *bis)
+void eth_init_board(void)
{
   int pin;
   struct sunxi_ccm_reg *const ccm =
@@ -79,16 +79,4 @@ int sunxi_gmac_initialize(bd_t *bis)
   for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
      sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
#endif
-
-#ifdef CONFIG_DM_ETH
-   return 0;
-#else
-# ifdef CONFIG_RGMII
-   return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
-# elif defined CONFIG_GMII
-   return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII);
-# else
-   return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
-# endif
-#endif
}
--
2.7.3
"

Kind regards,

Jon
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: chradev on June 02, 2016, 01:05:28 AM
Hi Jon,

To solve a slow GBit Ethernet I use U-Boot patch proposed by Olimex:
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7491 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7491)

It works fine for me for U-Boot up to ver. 2016.05.
Tested on Armbian with both legacy and mainline kernels.

You can see some test results:
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7762 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-2#entry7762)
http://forum.armbian.com/index.php/topic/853-armbian-customization/page-4#entry8074 (http://forum.armbian.com/index.php/topic/853-armbian-customization/page-4#entry8074)
where I have measured 980Mbps GBit LAN peak throughput.

Best regards
Chris
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on June 06, 2016, 12:55:29 AM
Hello,

Can anyone actually confirm that they have seen representative gigabit speed on lime2 hv rev e?
I am running:
root@lime2:~# cat /proc/version
Linux version 4.6.1-sunxi (root@ubuntu) (gcc version 4.8.4 (Ubuntu/Linaro 4.8.4-2ubuntu1~14.04.1) ) #1 SMP Sun Jun 5 13:34:47 CEST 2016

So no patches are enabled (by me), but iperf gives 895Mb/sec
root@lime2:~# iperf -s
------------------------------------------------------------
Server listening on TCP port 5001
TCP window size: 85.3 KByte (default)
------------------------------------------------------------
[  4] local 192.168.0.23 port 5001 connected with 192.168.0.24 port 43669
[ ID] Interval       Transfer     Bandwidthrdware
[  4]  0.0-10.0 sec  1.05 GBytes   895 Mbits/sec

When I apply the patches, iperf gives roughly the same figures.

In both cases, the actual transfer rates seen (yes, using scp which seems to be more 'read world') are 12MB/sec.
On my network I get at least 50MB/sec data rates.
Is there a hardware limitation restricting the data rates or am I misunderstanding/missing something?

Thanks,

Jon
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: soenke on June 07, 2016, 12:01:38 AM
scp and other high level protocols might be slower because the CPU wont be able to encrypt that much data at 100MB/s.
Try uncompressed netcat, that might work.
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: Albern on June 08, 2016, 07:03:26 PM
Hi

Can you describe your testing setup?
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on June 09, 2016, 05:11:36 PM
Hello, I am running armbian next jessie image, built by me.
This has been tested with patches for emmc and gigabit and without.
Connected directly to d-link unmanaged gigabit router.
Copy between corei3 laptop running centos 7 and the lime2-emmc.
Tried to copy to (cheap probably fake) sd card, emmc and ssd. Also /dev/null. Very little change in throughput so I guess the limit is not storage related.

root@lime2:/proc# cat version
Linux version 4.6.1-sunxi (root@ubuntu) (gcc version 4.8.4 (Ubuntu/Linaro 4.8.4-2ubuntu1~14.04.1) ) #1 SMP Sun Jun 5 23:31:55 CEST 2016

I will have a go at using nc.
Title: Re: A20-OLinuXino-LIME2 new HW Rev. E
Post by: jon on June 10, 2016, 08:22:51 PM
Using nc I get about 36 MB/s
Using nc with a gigabit usb 3.0 dingle I get 15 MB/s
Scp limit is about 12 MB/s using built in or use ethernet