I am having a lot of trouble enabling ethernet on my recently purchased board, i was wondering if anyone could help me. I am using the ESP32-PoE-ISO-IND board with the WROOM type microcontroller.
The project i am working on includes creating an OTA on the ESP32 that you van acces over Ethernet. But the Ethernet section doesnt seem to work. I tried a lot of things, changing CLK_MODE and reconfiguring the sdkconfig file but nothing seems to work. I can build and flash the software but when monitoring the board keeps resetting continuously with errors that the Ethernet cant initialize properly. I use the latest ESP-IDF.
CODE:
#include <string.h>
#include "esp_system.h"
#include "esp_event.h"
#include "esp_log.h"
#include "esp_netif.h"
#include "esp_eth.h"
#include "esp_eth_mac.h"
#include "esp_eth_phy.h"
#include "esp_http_server.h"
#include "nvs_flash.h"
#include "esp_ota_ops.h"
#include "esp_flash_partitions.h"
#include "esp_partition.h"
#include "driver/gpio.h"
#include "esp_netif_ip_addr.h"
#include "esp_image_format.h"
#include "esp_eth_mac_esp.h"
#include "esp_mac.h"
#define ETH_PHY_ADDR 0
#define ETH_MDC_GPIO 23
#define ETH_MDIO_GPIO 18
#define ETH_PHY_POWER_GPIO 12
#define ETH_CLOCK_MODE ETH_CLOCK_GPIO17_OUT
#define STATIC_IP_ADDR "192.168.1.100"
#define STATIC_GW_ADDR "192.168.1.1"
#define STATIC_NETMASK "255.255.255.0"
static const char *TAG = "web_ota";
void app_main(void) {
ESP_ERROR_CHECK(nvs_flash_init());
ESP_ERROR_CHECK(esp_netif_init());
ESP_ERROR_CHECK(esp_event_loop_create_default());
esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH();
esp_netif_t *eth_netif = esp_netif_new(&cfg);
// Set static IP
esp_netif_ip_info_t ip_info;
ip_info.ip.addr = esp_ip4addr_aton(STATIC_IP_ADDR);
ip_info.gw.addr = esp_ip4addr_aton(STATIC_GW_ADDR);
ip_info.netmask.addr = esp_ip4addr_aton(STATIC_NETMASK);
esp_netif_dhcpc_stop(eth_netif);
esp_netif_set_ip_info(eth_netif, &ip_info);
// Setup MAC & PHY
eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG();
eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG();
phy_config.phy_addr = ETH_PHY_ADDR;
phy_config.autonego_timeout_ms = 0;
eth_esp32_emac_config_t esp32_emac_config = ETH_ESP32_EMAC_DEFAULT_CONFIG();
esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&esp32_emac_config, &mac_config);
esp_eth_phy_t *phy = esp_eth_phy_new_lan87xx(&phy_config);
esp_eth_config_t eth_config = ETH_DEFAULT_CONFIG(mac, phy);
esp_eth_handle_t eth_handle = NULL;
ESP_ERROR_CHECK(esp_eth_driver_install(ð_config, ð_handle));
ESP_ERROR_CHECK(esp_netif_attach(eth_netif, esp_eth_new_netif_glue(eth_handle)));
ESP_ERROR_CHECK(esp_eth_start(eth_handle));
ESP_LOGI(TAG, "Ethernet started, static IP: %s", STATIC_IP_ADDR);
// Start web server
start_webserver();
}
ERRORS:
--- 0x40080400: _invalid_pc_placeholder at C:/Users/sande/esp/v5.5/esp-idf/components/xtensa/xtensa_vectors.S:2235
entry 0x40080638
I (29) boot: ESP-IDF v5.5 2nd stage bootloader
I (29) boot: compile time Aug 4 2025 09:23:48
I (29) boot: Multicore bootloader
I (30) boot: chip revision: v3.1
I (33) boot.esp32: SPI Speed : 40MHz
I (37) boot.esp32: SPI Mode : DIO
I (40) boot.esp32: SPI Flash Size : 4MB
I (44) boot: Enabling RNG early entropy source...
I (48) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (57) boot: 0 nvs WiFi data 01 02 00009000 00004000
I (64) boot: 1 otadata OTA data 01 00 0000d000 00002000
I (70) boot: 2 phy_init RF data 01 01 0000f000 00001000
I (77) boot: 3 factory factory app 00 00 00010000 00100000
I (83) boot: 4 ota_0 OTA app 00 10 00110000 00100000
I (90) boot: 5 ota_1 OTA app 00 11 00210000 00100000
I (97) boot: End of partition table
I (100) boot: Defaulting to factory image
I (104) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=15e78h ( 89720) map
I (142) esp_image: segment 1: paddr=00025ea0 vaddr=3ff80000 size=00020h ( 32) load
I (142) esp_image: segment 2: paddr=00025ec8 vaddr=3ffb0000 size=02600h ( 9728) load
I (149) esp_image: segment 3: paddr=000284d0 vaddr=40080000 size=07b48h ( 31560) load
I (166) esp_image: segment 4: paddr=00030020 vaddr=400d0020 size=41d5ch (269660) map
I (258) esp_image: segment 5: paddr=00071d84 vaddr=40087b48 size=06bach ( 27564) load
I (276) boot: Loaded app from partition at offset 0x10000
I (276) boot: Disabling RNG early entropy source...
I (287) cpu_start: Multicore app
I (295) cpu_start: Pro cpu start user code
I (295) cpu_start: cpu freq: 160000000 Hz
I (295) app_init: Application information:
I (295) app_init: Project name: web_ota_ethernet
I (300) app_init: App version: 1
I (303) app_init: Compile time: Aug 4 2025 09:23:13
I (308) app_init: ELF file SHA256: 061955d05...
I (312) app_init: ESP-IDF: v5.5
I (316) efuse_init: Min chip rev: v0.0
I (320) efuse_init: Max chip rev: v3.99
I (324) efuse_init: Chip rev: v3.1
I (328) heap_init: Initializing. RAM available for dynamic allocation:
I (334) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (339) heap_init: At 3FFB3920 len 0002C6E0 (177 KiB): DRAM
I (344) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (350) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (355) heap_init: At 4008E6F4 len 0001190C (70 KiB): IRAM
I (362) spi_flash: detected chip: generic
I (364) spi_flash: flash io: dio
I (368) main_task: Started on CPU0
I (378) main_task: Calling app_main()
E (488) esp.emac: emac_esp32_init(548): reset timeout
E (488) esp_eth: esp_eth_driver_install(250): init mac failed
ESP_ERROR_CHECK failed: esp_err_t 0x107 (ESP_ERR_TIMEOUT) at 0x400d915a
--- 0x400d915a: app_main at C:/Users/sande/web_ota_ethernet/main/main.c:156
file: "./main/main.c" line 156
func: app_main
expression: esp_eth_driver_install(ð_config, ð_handle)
abort() was called at PC 0x4008609f on core 0
--- 0x4008609f: _esp_error_check_failed at C:/Users/sande/esp/v5.5/esp-idf/components/esp_system/esp_err.c:49
Are you sure this is the proper macro for the clock "#define ETH_CLOCK_MODE ETH_CLOCK_GPIO17_OUT"? I feel like it was ETH_CLK_MODE but maybe they changed it recently.
Maybe check our ESP-IDF 5.3 project for the Ethernet: https://github.com/OLIMEX/ESP32-POE/tree/master/SOFTWARE/ESP-IDF/ESP32_PoE_Ethernet_IDFv5.3