hello
I'm trying to get the A20 LCD driver to work with a LCD that uses a LVDS interface and requires the DE, HSYNC and VSYNC signals to be present in the LVDS stream.
I've found some tutorials on linux-sunxi on how to configure the LVDS and managed to get some signals out, but the HSYNC and VSYNC bits in LVDS pair 2 are not generated: I can see the DE bit changing but the other 2 are stuck at 1 => the lcd can not properly sync and only garbage is displayed.
All the LCD's used by the tutorials for A20 / cubieboard do not need these 2 signals - "DE only mode"
Can the A20 LCD controller output those 2 signals via LVDS ?
the display's documentation is at this address: https://drive.google.com/file/d/0B0CB5A9yU03XRFhzbm5Jcmhfc2M/edit?usp=sharing
the lvds format is at page 13 - RIn2 contains HSYNC and VSYNC (the datasheet is correct - I've managed to sync that display to FPGA based video generator)
Best regards,
Alexandru