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Defines | |
| #define | PLLx06 ( (0<<PLLP2) | (0<<PLLP1) | (0<<PLLP0) ) |
| #define | PLLx03 ( (0<<PLLP2) | (0<<PLLP1) | (1<<PLLP0) ) |
| #define | Start_pll(clockfactor) (PLLCSR = ( clockfactor | (1<<PLLE) )) |
| Start the PLL at only 48 MHz, regarding CPU frequency Start the USB PLL with clockfactor clockfactor can be PLLx24, PLLx12, PLLx08 PLLx06, PLLx04, PLLx03. | |
| #define | Is_pll_ready() (PLLCSR & (1<<PLOCK) ) |
| return 1 when PLL locked | |
| #define | Wait_pll_ready() while (!(PLLCSR & (1<<PLOCK))) |
| Test PLL lock bit and wait until lock is set. | |
| #define | Stop_pll() (PLLCSR &= (~(1<<PLLE)) ) |
| Stop the PLL. | |
Copyright (c) 2006 Atmel.
Please read file license.txt for copyright notice.
Definition in file pll_drv.h.
1.5.1-p1