# Watchdog Timer Controller Interface Peripheral

WDTC (AT91S_WDTC) 0xFFFFFD40 (AT91C_BASE_WDTC)

## WDTC Software API (AT91S_WDTC)

Offset | Field | Description
0x0 | WDTC_WDCR (SYSC_WDCR) | Watchdog Control Register
0x4 | WDTC_WDMR (SYSC_WDMR) | Watchdog Mode Register
0x8 | WDTC_WDSR (SYSC_WDSR) | Watchdog Status Register

## WDTC Register Description

#### WDTC: AT91_REG SYSC_WDCR Watchdog Control Register

- WDTC AT91C_WDTC_WDCR 0xFFFFFD40

Offset | Name | Description
0 | SYSC_WDRSTT AT91C_SYSC_WDRSTT | Watchdog Restart 0 = No effect. 1 = Reload the Watchdog.
31..24 | SYSC_KEY AT91C_SYSC_KEY | Password Should be written at value 0xA5. Writting any other value in this field aborts the write operation.

#### WDTC: AT91_REG SYSC_WDMR Watchdog Mode Register

- WDTC AT91C_WDTC_WDMR 0xFFFFFD44

Write Once !!!

Offset | Name | Description
11..0 | SYSC_WDV AT91C_SYSC_WDV | Watchdog Timer Restart Defines the value loaded in the 16-bit counter. Programming 0 disables the wathchdog.
12 | SYSC_WDFIEN AT91C_SYSC_WDFIEN | Watchdog Fault Interrupt Enable 0 = A Watchdog fault (underflow or error) has no effect on SCIRQ. 1 = A Watchdog fault (underflow or error) asserts SCIRQ.
13 | SYSC_WDRSTEN AT91C_SYSC_WDRSTEN | Watchdog Reset Enable 0 = A watchdog overflow has no effect on the resets. 1 = A watchdog overflow trigs a watchdog reset (general reset).
14 | SYSC_WDRPROC AT91C_SYSC_WDRPROC | Watchdog Timer Restart 0 = A watchdog overflow has no effect on the processor reset. 1 = A watchdog overflow trigs a processor reset.
15 | SYSC_WDDIS AT91C_SYSC_WDDIS | Watchdog Disable
27..16 | SYSC_WDD AT91C_SYSC_WDD | Watchdog Delta Value
28 | SYSC_WDDBGHLT AT91C_SYSC_WDDBGHLT | Watchdog Debug Halt 0 = The watchdog runs when the processor is in debug state. 1 = The watchdog stops when the processor is in debug state.
29 | SYSC_WDIDLEHLT AT91C_SYSC_WDIDLEHLT | Watchdog Idle Halt 0 = The watchdog runs when the system is in idle mode. 1 = The watchdog stops when the system is in idle mode.

#### WDTC: AT91_REG SYSC_WDSR Watchdog Status Register

- WDTC AT91C_WDTC_WDSR 0xFFFFFD48

Offset | Name | Description
0 | SYSC_WDUNF AT91C_SYSC_WDUNF | Watchdog Underflow 0 = No Watchdog Underflow occured since the last read of SYSC_WDSR. 1 = At least one Watchdog Underflow occured since the last read of SYSC_WDSR.
1 | SYSC_WDERR AT91C_SYSC_WDERR | Watchdog Error 0 = No watchdog error occured since the last read of SYSC_WDSR. 1 = At least one watchdog error occured since the last read of SYSC_WDSR.