# Pulse Width Modulation Controller Interface Peripheral

PWMC (AT91S_PWMC) 0xFFFCC000 (AT91C_BASE_PWMC)

Periph ID AIC | Symbol | Description
10 | (AT91C_ID_PWMC) | PWM Controller

Function | Description
AT91F_PWMC_CfgPMC | Enable Peripheral clock in PMC for PWMC

## PWMC Software API (AT91S_PWMC)

Offset | Field | Description
0x0 | PWMC_MR | PWMC Mode Register
0x4 | PWMC_ENA | PWMC Enable Register
0x8 | PWMC_DIS | PWMC Disable Register
0xC | PWMC_SR | PWMC Status Register
0x10 | PWMC_IER | PWMC Interrupt Enable Register
0x14 | PWMC_IDR | PWMC Interrupt Disable Register
0x18 | PWMC_IMR | PWMC Interrupt Mask Register
0x1C | PWMC_ISR | PWMC Interrupt Status Register
0xFC | PWMC_VR | PWMC Version Register
0x200 | PWMC_CH[32] (PWMC_CH) | PWMC Channel 0

Function | Description
AT91F_PWM_StopChannel | Disable channel
AT91F_PWM_GetStatus | Return PWM Interrupt Status
AT91F_PWM_CfgChannel | Test if PWM Interrupt is Set
AT91F_PWM_IsInterruptMasked | Test if PWM Interrupt is Masked
AT91F_PWM_InterruptEnable | Enable PWM Interrupt
AT91F_PWM_InterruptDisable | Disable PWM Interrupt
AT91F_PWM_IsStatusSet | Test if PWM Interrupt is Set
AT91F_PWM_StartChannel | Enable channel
AT91F_PWM_UpdateChannel | Update Period or Duty Cycle
AT91F_PWM_GetInterruptMaskStatus | Return PWM Interrupt Mask Status

## PWMC Register Description

#### PWMC: AT91_REG PWMC_MR PWMC Mode Register

- PWMC AT91C_PWMC_MR 0xFFFCC000

Offset | Name | Description
7..0 | PWMC_DIVA AT91C_PWMC_DIVA | CLKA divide factor.
11..8 | PWMC_PREA AT91C_PWMC_PREA | Divider Input Clock Prescaler A Value | Label | Description
0 | PWMC_PREA_MCK AT91C_PWMC_PREA_MCK |
1 | PWMC_PREA_MCK/2 AT91C_PWMC_PREA_MCK/2 |
2 | PWMC_PREA_MCK/4 AT91C_PWMC_PREA_MCK/4 |
3 | PWMC_PREA_MCK/8 AT91C_PWMC_PREA_MCK/8 |
4 | PWMC_PREA_MCK/16 AT91C_PWMC_PREA_MCK/16 |
5 | PWMC_PREA_MCK/32 AT91C_PWMC_PREA_MCK/32 |
6 | PWMC_PREA_MCK/64 AT91C_PWMC_PREA_MCK/64 |
7 | PWMC_PREA_MCK/128 AT91C_PWMC_PREA_MCK/128 |
8 | PWMC_PREA_MCK/256 AT91C_PWMC_PREA_MCK/256 |
23..16 | PWMC_DIVB AT91C_PWMC_DIVB | CLKB divide factor.
27..24 | PWMC_PREB AT91C_PWMC_PREB | Divider Input Clock Prescaler B Value | Label | Description
0 | PWMC_PREB_MCK AT91C_PWMC_PREB_MCK |
1 | PWMC_PREB_MCK/2 AT91C_PWMC_PREB_MCK/2 |
2 | PWMC_PREB_MCK/4 AT91C_PWMC_PREB_MCK/4 |
3 | PWMC_PREB_MCK/8 AT91C_PWMC_PREB_MCK/8 |
4 | PWMC_PREB_MCK/16 AT91C_PWMC_PREB_MCK/16 |
5 | PWMC_PREB_MCK/32 AT91C_PWMC_PREB_MCK/32 |
6 | PWMC_PREB_MCK/64 AT91C_PWMC_PREB_MCK/64 |
7 | PWMC_PREB_MCK/128 AT91C_PWMC_PREB_MCK/128 |
8 | PWMC_PREB_MCK/256 AT91C_PWMC_PREB_MCK/256 |

#### PWMC: AT91_REG PWMC_ENA PWMC Enable Register

- PWMC AT91C_PWMC_ENA 0xFFFCC004

Enable PWMC output for the corresponding channel

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_DIS PWMC Disable Register

- PWMC AT91C_PWMC_DIS 0xFFFCC008

Disable PWMC output for the corresponding channel

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_SR PWMC Status Register

- PWMC AT91C_PWMC_SR 0xFFFCC00C

0: PWMC output for channel X is disabled.
1: PWMC output for channel X is enabled.

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_IER PWMC Interrupt Enable Register

- PWMC AT91C_PWMC_IER 0xFFFCC010

0: No effect.
1: Enable Interrupt for PWMC channel X.

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_IDR PWMC Interrupt Disable Register

- PWMC AT91C_PWMC_IDR 0xFFFCC014

0: No effect.
1: Disable Interrupt for PWMC channel X.

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_IMR PWMC Interrupt Mask Register

- PWMC AT91C_PWMC_IMR 0xFFFCC018

0: Interrupt for PWMC channel X is disabled.
1: Interrupt for PWMC channel X is enabled.

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_ISR PWMC Interrupt Status Register

- PWMC AT91C_PWMC_ISR 0xFFFCC01C

0: No Interrupt for PWMC channel X pending. 1: Interrupt for PWMC channel X has raised.

Offset | Name | Description
0 | PWMC_CHID0 AT91C_PWMC_CHID0 | Channel ID 0
1 | PWMC_CHID1 AT91C_PWMC_CHID1 | Channel ID 1
2 | PWMC_CHID2 AT91C_PWMC_CHID2 | Channel ID 2
3 | PWMC_CHID3 AT91C_PWMC_CHID3 | Channel ID 3
4 | PWMC_CHID4 AT91C_PWMC_CHID4 | Channel ID 4
5 | PWMC_CHID5 AT91C_PWMC_CHID5 | Channel ID 5
6 | PWMC_CHID6 AT91C_PWMC_CHID6 | Channel ID 6
7 | PWMC_CHID7 AT91C_PWMC_CHID7 | Channel ID 7

#### PWMC: AT91_REG PWMC_VR PWMC Version Register

- PWMC AT91C_PWMC_VR 0xFFFCC0FC

#### PWMC: AT91S_PWMC_CH PWMC_CH PWMC Channel 0

- PWMC AT91C_PWMC_CH 0xFFFCC200