# Power Management Controler Peripheral

PMC (AT91S_PMC) 0xFFFFFC00 (AT91C_BASE_PMC)

Periph ID AIC | Symbol | Description
1 | (AT91C_ID_SYS) | System Peripheral

Signal | Symbol | PIO controller | Description
PCK1 | (AT91C_PA17_PCK1 ) | PIOA Periph: B Bit: 17 | PMC Programmable Clock Output 1
PCK1 | (AT91C_PA21_PCK1 ) | PIOA Periph: B Bit: 21 | PMC Programmable Clock Output 1
PCK2 | (AT91C_PA31_PCK2 ) | PIOA Periph: B Bit: 31 | PMC Programmable Clock Output 2
PCK2 | (AT91C_PA18_PCK2 ) | PIOA Periph: B Bit: 18 | PMC Programmable Clock Output 2
PCK0 | (AT91C_PA6_PCK0 ) | PIOA Periph: B Bit: 6 | PMC Programmable Clock Output 0

Function | Description
AT91F_PMC_CfgPMC | Enable Peripheral clock in PMC for PMC
AT91F_PMC_CfgPIO | Configure PIO controllers to drive PMC signals

## PMC Software API (AT91S_PMC)

Offset | Field | Description
0x0 | PMC_SCER | System Clock Enable Register
0x4 | PMC_SCDR | System Clock Disable Register
0x8 | PMC_SCSR | System Clock Status Register
0x10 | PMC_PCER | Peripheral Clock Enable Register
0x14 | PMC_PCDR | Peripheral Clock Disable Register
0x18 | PMC_PCSR | Peripheral Clock Status Register
0x20 | PMC_MOR (CKGR_MOR) | Main Oscillator Register
0x24 | PMC_MCFR (CKGR_MCFR) | Main Clock Frequency Register
0x2C | PMC_PLLR (CKGR_PLLR) | PLL Register
0x30 | PMC_MCKR | Master Clock Register
0x40 | PMC_PCKR[8] (PMC_PCKR) | Programmable Clock Register
0x60 | PMC_IER | Interrupt Enable Register
0x64 | PMC_IDR | Interrupt Disable Register
0x68 | PMC_SR | Status Register
0x6C | PMC_IMR | Interrupt Mask Register

Function | Description
AT91F_PMC_GetInterruptMaskStatus | Return PMC Interrupt Mask Status
AT91F_CKGR_DisableMainOscillator | Disable the main oscillator
AT91F_CKGR_GetMainOscillatorReg | Cfg the main oscillator
AT91F_PMC_CfgSysClkEnableReg | Configure the System Clock Enable Register of the PMC controller
AT91F_PMC_EnablePeriphClock | Enable peripheral clock
AT91F_CKGR_GetMainClock | Return Main clock in Hz
AT91F_PMC_CfgSysClkDisableReg | Configure the System Clock Disable Register of the PMC controller
AT91F_PMC_DisablePeriphClock | Disable peripheral clock
AT91F_PMC_IsInterruptMasked | Test if PMC Interrupt is Masked
AT91F_PMC_EnableIt | Enable PMC interrupt
AT91F_PMC_DisablePCK | Enable peripheral clock
AT91F_PMC_GetSysClkStatusReg | Return the System Clock Status Register of the PMC controller
AT91F_PMC_GetPeriphClock | Get peripheral clock status
AT91F_PMC_EnablePCK | Enable peripheral clock
AT91F_CKGR_EnableMainOscillator | Enable the main oscillator
AT91F_CKGR_GetMainClockFreqReg | Cfg the main oscillator
AT91F_PMC_GetMCKReg | Return Master Clock Register
AT91F_PMC_GetMasterClock | Return master clock in Hz which correponds to processor clock for ARM7
AT91F_PMC_IsStatusSet | Test if PMC Status is Set
AT91F_PMC_DisableIt | Disable PMC interrupt
AT91F_CKGR_CfgMainOscStartUpTime | Cfg MOR Register according to the main osc startup time
AT91F_PMC_GetStatus | Return PMC Interrupt Status
AT91F_CKGR_CfgMainOscillatorReg | Cfg the main oscillator
AT91F_PMC_CfgMCKReg | Cfg Master Clock Register

## PMC Register Description

#### PMC: AT91_REG PMC_SCER System Clock Enable Register

- PMC AT91C_PMC_SCER 0xFFFFFC00

Offset | Name | Description
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.

#### PMC: AT91_REG PMC_SCDR System Clock Disable Register

- PMC AT91C_PMC_SCDR 0xFFFFFC04

Offset | Name | Description
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.

#### PMC: AT91_REG PMC_SCSR System Clock Status Register

- PMC AT91C_PMC_SCSR 0xFFFFFC08

Offset | Name | Description
0 | PMC_PCK AT91C_PMC_PCK | Processor Clock 0 = The processor clock is disabled 1 = The processor clock is enabled
7 | PMC_UDP AT91C_PMC_UDP | USB Device Port Clock 0 = The 48 MHz clock of the USB Device Port is disabled 1 = The 48 MHz clock of the USB Device Port is enabled
8 | PMC_PCK0 AT91C_PMC_PCK0 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
9 | PMC_PCK1 AT91C_PMC_PCK1 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
10 | PMC_PCK2 AT91C_PMC_PCK2 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.
11 | PMC_PCK3 AT91C_PMC_PCK3 | Programmable Clock Output 0 = The corresponding programmable clock output is disabled. 1 = The corresponding programmable clock output is enabled.

#### PMC: AT91_REG PMC_PCER Peripheral Clock Enable Register

- PMC AT91C_PMC_PCER 0xFFFFFC10

PID2...PID31: Peripheral Identifier 2 to 31
0 = No effect.
1 = Enables the peripheral clock.

#### PMC: AT91_REG PMC_PCDR Peripheral Clock Disable Register

- PMC AT91C_PMC_PCDR 0xFFFFFC14

PID2...PID31: Peripheral Identifier 2 to 31
0 = No effect.
1 = Disables the peripheral clock.

#### PMC: AT91_REG PMC_PCSR Peripheral Clock Status Register

- PMC AT91C_PMC_PCSR 0xFFFFFC18

PID2...PID31: Peripheral Identifier 2 to 31
0 = peripheral clock disabled.
1 = peripheral clock enabled.

#### PMC: AT91_REG CKGR_MOR Main Oscillator Register

- PMC AT91C_PMC_MOR 0xFFFFFC20

Offset | Name | Description
0 | CKGR_MOSCEN AT91C_CKGR_MOSCEN | Main Oscillator Enable 0 = The main oscillator is disabled. 1 = The main oscillator is enabled.
1 | CKGR_OSCBYPASS AT91C_CKGR_OSCBYPASS | Main Oscillator Bypass 0 = The main oscillator is not bypassed. 1 = The main oscillator is bypassed. MOSCEN bit must be set to 0.
15..8 | CKGR_OSCOUNT AT91C_CKGR_OSCOUNT | Main Oscillator Start-up Time Specifies the number of slow clock cycles multiplied by 8 for the main oscillator start-up time.

#### PMC: AT91_REG CKGR_MCFR Main Clock Frequency Register

- PMC AT91C_PMC_MCFR 0xFFFFFC24

Offset | Name | Description
15..0 | CKGR_MAINF AT91C_CKGR_MAINF | Main Clock Frequency Gives the number of main clock cycles within 16 slow clock periods.
16 | CKGR_MAINRDY AT91C_CKGR_MAINRDY | Main Clock Ready 0 = FMAIN value is not valid or the main oscillator is disabled. 1 = The main oscillator has been enabled previously and MAINF value is available.

#### PMC: AT91_REG CKGR_PLLR PLL Register

- PMC AT91C_PMC_PLLR 0xFFFFFC2C

Offset | Name | Description
7..0 | CKGR_DIV AT91C_CKGR_DIV | Divider Selected 2-255 Divider output is the selected clock divided by DIV Value | Label | Description
0 | CKGR_DIV_0 AT91C_CKGR_DIV_0 | Divider output is 0
1 | CKGR_DIV_BYPASS AT91C_CKGR_DIV_BYPASS | Divider is bypassed
13..8 | CKGR_PLLCOUNT AT91C_CKGR_PLLCOUNT | PLL Counter Specifies the number of slow clock cycles before the LOCK bit is set in APMC_SR after APMC_PLL is written.
15..14 | CKGR_OUT AT91C_CKGR_OUT | PLL Output Frequency Range Value | Label | Description
0 | CKGR_OUT_0 AT91C_CKGR_OUT_0 | Please refer to the PLL datasheet
1 | CKGR_OUT_1 AT91C_CKGR_OUT_1 | Please refer to the PLL datasheet
2 | CKGR_OUT_2 AT91C_CKGR_OUT_2 | Please refer to the PLL datasheet
3 | CKGR_OUT_3 AT91C_CKGR_OUT_3 | Please refer to the PLL datasheet
26..16 | CKGR_MUL AT91C_CKGR_MUL | PLL Multiplier 0 = The PLL is deactivated. 1 up to 2047 = The PLL output frequency is the PLL input frequency multiplied by MUL + 1.
29..28 | CKGR_USBDIV AT91C_CKGR_USBDIV | Divider for USB Clocks Value | Label | Description
0 | CKGR_USBDIV_0 AT91C_CKGR_USBDIV_0 | Divider output is PLL clock output
1 | CKGR_USBDIV_1 AT91C_CKGR_USBDIV_1 | Divider output is PLL clock output divided by 2
2 | CKGR_USBDIV_2 AT91C_CKGR_USBDIV_2 | Divider output is PLL clock output divided by 4

#### PMC: AT91_REG PMC_MCKR Master Clock Register

- PMC AT91C_PMC_MCKR 0xFFFFFC30

Offset | Name | Description
1..0 | PMC_CSS AT91C_PMC_CSS | Programmable Clock Selection Clock selection Value | Label | Description
0 | PMC_CSS_SLOW_CLK AT91C_PMC_CSS_SLOW_CLK | Slow Clock is selected
1 | PMC_CSS_MAIN_CLK AT91C_PMC_CSS_MAIN_CLK | Main Clock is selected
3 | PMC_CSS_PLL_CLK AT91C_PMC_CSS_PLL_CLK | Clock from PLL is selected
4..2 | PMC_PRES AT91C_PMC_PRES | Programmable Clock Prescaler Master clock Value | Label | Description
0 | PMC_PRES_CLK AT91C_PMC_PRES_CLK | Selected clock
1 | PMC_PRES_CLK_2 AT91C_PMC_PRES_CLK_2 | Selected clock divided by 2
2 | PMC_PRES_CLK_4 AT91C_PMC_PRES_CLK_4 | Selected clock divided by 4
3 | PMC_PRES_CLK_8 AT91C_PMC_PRES_CLK_8 | Selected clock divided by 8
4 | PMC_PRES_CLK_16 AT91C_PMC_PRES_CLK_16 | Selected clock divided by 16
5 | PMC_PRES_CLK_32 AT91C_PMC_PRES_CLK_32 | Selected clock divided by 32
6 | PMC_PRES_CLK_64 AT91C_PMC_PRES_CLK_64 | Selected clock divided by 64

#### PMC: AT91_REG PMC_PCKR Programmable Clock Register

- PMC AT91C_PMC_PCKR 0xFFFFFC40

Offset | Name | Description
1..0 | PMC_CSS AT91C_PMC_CSS | Programmable Clock Selection Clock selection Value | Label | Description
0 | PMC_CSS_SLOW_CLK AT91C_PMC_CSS_SLOW_CLK | Slow Clock is selected
1 | PMC_CSS_MAIN_CLK AT91C_PMC_CSS_MAIN_CLK | Main Clock is selected
3 | PMC_CSS_PLL_CLK AT91C_PMC_CSS_PLL_CLK | Clock from PLL is selected
4..2 | PMC_PRES AT91C_PMC_PRES | Programmable Clock Prescaler Master clock Value | Label | Description
0 | PMC_PRES_CLK AT91C_PMC_PRES_CLK | Selected clock
1 | PMC_PRES_CLK_2 AT91C_PMC_PRES_CLK_2 | Selected clock divided by 2
2 | PMC_PRES_CLK_4 AT91C_PMC_PRES_CLK_4 | Selected clock divided by 4
3 | PMC_PRES_CLK_8 AT91C_PMC_PRES_CLK_8 | Selected clock divided by 8
4 | PMC_PRES_CLK_16 AT91C_PMC_PRES_CLK_16 | Selected clock divided by 16
5 | PMC_PRES_CLK_32 AT91C_PMC_PRES_CLK_32 | Selected clock divided by 32
6 | PMC_PRES_CLK_64 AT91C_PMC_PRES_CLK_64 | Selected clock divided by 64

#### PMC: AT91_REG PMC_IER Interrupt Enable Register

- PMC AT91C_PMC_IER 0xFFFFFC60

Offset | Name | Description
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized.
2 | PMC_LOCK AT91C_PMC_LOCK | PLL Status/Enable/Disable/Mask 0 = PLL is not locked. 1 = PLL is locked.
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | MCK_RDY Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on.
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on.
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on.
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on.
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on.

#### PMC: AT91_REG PMC_IDR Interrupt Disable Register

- PMC AT91C_PMC_IDR 0xFFFFFC64

Offset | Name | Description
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized.
2 | PMC_LOCK AT91C_PMC_LOCK | PLL Status/Enable/Disable/Mask 0 = PLL is not locked. 1 = PLL is locked.
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | MCK_RDY Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on.
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on.
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on.
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on.
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on.

#### PMC: AT91_REG PMC_SR Status Register

- PMC AT91C_PMC_SR 0xFFFFFC68

Offset | Name | Description
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized.
2 | PMC_LOCK AT91C_PMC_LOCK | PLL Status/Enable/Disable/Mask 0 = PLL is not locked. 1 = PLL is locked.
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | MCK_RDY Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on.
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on.
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on.
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on.
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on.

#### PMC: AT91_REG PMC_IMR Interrupt Mask Register

- PMC AT91C_PMC_IMR 0xFFFFFC6C

Offset | Name | Description
0 | PMC_MOSCS AT91C_PMC_MOSCS | MOSC Status/Enable/Disable/Mask 0 = Main oscillator is not stabilized. 1 = Main oscillator is stabilized.
2 | PMC_LOCK AT91C_PMC_LOCK | PLL Status/Enable/Disable/Mask 0 = PLL is not locked. 1 = PLL is locked.
3 | PMC_MCKRDY AT91C_PMC_MCKRDY | MCK_RDY Status/Enable/Disable/Mask 0 = MCK Clock is not ready to be turned on. 1 = MCK Clock is ready to be turned on.
8 | PMC_PCK0RDY AT91C_PMC_PCK0RDY | PCK0_RDY Status/Enable/Disable/Mask 0 = Pad Clock0 is not ready to be turned on. 1 = Pad Clock0 is ready to be turned on.
9 | PMC_PCK1RDY AT91C_PMC_PCK1RDY | PCK1_RDY Status/Enable/Disable/Mask 0 = Pad Clock1 is not ready to be turned on. 1 = Pad Clock1 is ready to be turned on.
10 | PMC_PCK2RDY AT91C_PMC_PCK2RDY | PCK2_RDY Status/Enable/Disable/Mask 0 = Pad Clock2 is not ready to be turned on. 1 = Pad Clock2 is ready to be turned on.
11 | PMC_PCK3RDY AT91C_PMC_PCK3RDY | PCK3_RDY Status/Enable/Disable/Mask 0 = Pad Clock3 is not ready to be turned on. 1 = Pad Clock3 is ready to be turned on.