/*****************************************************************************
 *
 *              ConfigFuses.c -- user main program
 *
 *****************************************************************************
 * FileName:        ConfigFuses.c
 * Dependencies:
 * Processor:       PIC18F
 * Compiler:        C18 02.20.00 or higher
 *                  PICC 9.50.00 or higher
 *                  C30 02.03.00 or higher
 * Linker:          MPLINK 03.40.00 or higher
 * Company:         Microchip Technology Incorporated
 *
 * Software License Agreement
 *
 * Copyright © 2007-2008 Microchip Technology Inc.  All rights reserved.
 *
 * Microchip licenses to you the right to use, modify, copy and distribute 
 * Software only when embedded on a Microchip microcontroller or digital 
 * signal controller and used with a Microchip radio frequency transceiver, 
 * which are integrated into your product or third party product (pursuant 
 * to the terms in the accompanying license agreement). 
 *
 * You should refer to the license agreement accompanying this Software for 
 * additional information regarding your rights and obligations.
 *
 * SOFTWARE AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY 
 * KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY 
 * WARRANTY OF MERCHANTABILITY, TITLE, NON-INFRINGEMENT AND FITNESS FOR A 
 * PARTICULAR PURPOSE. IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE 
 * LIABLE OR OBLIGATED UNDER CONTRACT, NEGLIGENCE, STRICT LIABILITY, 
 * CONTRIBUTION, BREACH OF WARRANTY, OR OTHER LEGAL EQUITABLE THEORY ANY 
 * DIRECT OR INDIRECT DAMAGES OR EXPENSES INCLUDING BUT NOT LIMITED TO 
 * ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR CONSEQUENTIAL DAMAGES, 
 * LOST PROFITS OR LOST DATA, COST OF PROCUREMENT OF SUBSTITUTE GOODS, 
 * TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT 
 * NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
 *****************************************************************************/

#include "Compiler.h"

//	#pragma romdata CONFIG1H = 0x300001
//	const rom unsigned char config1H = 0b00000110;      // HSPLL oscillator
//	
//	#pragma romdata CONFIG2L = 0x300002
//	const rom unsigned char config2L = 0b00011111;      // Brown-out Reset Enabled in hardware @ 2.0V, PWRTEN disabled
//	
//	#pragma romdata CONFIG2H = 0x300003
//	const rom unsigned char config2H = 0b00010000; //0b00001010;      // HW WD disabled, 1:32 prescaler
//	
//	#pragma romdata CONFIG3H = 0x300005
//	const rom unsigned char config3H = 0b10000000;      // PORTB digital on RESET
//	
//	#pragma romdata CONFIG4L = 0x300006
//	const rom unsigned char config4L = 0b01000001;      // DEBUG enabled,
//	                                                    // XINST enabled
//	                                                    // LVP disabled
//	                                                    // STVREN enabled

/* Set up the configuration bits */
#pragma config FOSC = INTIO67, FCMEN = OFF, IESO = OFF
#pragma config PWRT = OFF //ON <- orig
#pragma config BOREN = OFF, BORV = 18
#pragma config WDTEN = OFF, WDTPS = 32768
#pragma config MCLRE = ON //OFF <- orig
#pragma config HFOFST = OFF // The system clock is held off until the HF-INTOSC is stable.  
#pragma config LPT1OSC = OFF
#pragma config PBADEN = OFF // PORTB<4:0> pins are configured as digital I/O on Reset
#pragma config CCP2MX = PORTBE // CCP2 input/output is multiplexed with RB3
//#pragma config CCP2MX = PORTC // CCP2 input/output is multiplexed with RC1  
#pragma config STVREN = ON // Stack full/underflow will cause Reset  
#pragma config LVP = OFF // Single-Supply ICSP disabled 
#pragma config XINST = OFF // Extended Mode OFF
#pragma config DEBUG = ON

// code protection settings
#pragma config CP0 = OFF // Block 0 (000800-003FFFh) not code-protected 
#pragma config CP1 = OFF // Block 1 (004000-007FFFh) not code-protected 
#pragma config CP2 = OFF // Block 2 (008000-00BFFFh) not code-protected 
#pragma config CP3 = OFF // Block 3 (00C000-00FFFFh) not code-protected 

// Boot Block Code Protection bit:
#pragma config CPB = OFF // Boot block (000000-0007FFh) not code-protected  

// Data EEPROM Code Protection bit:
#pragma config CPD = OFF // Data EEPROM not code-protected  

// Write Protection Block:
#pragma config WRT0 = OFF // Block 0 (000800-003FFFh) not write-protected  
#pragma config WRT1 = OFF // Block 1 (004000-007FFFh) not write-protected 
#pragma config WRT2 = OFF // Block 2 (008000-00BFFFh) not write-protected 
#pragma config WRT3 = OFF // Block 3 (00C000-00FFFFh) not write-protected

// Boot Block Write Protection bit:
#pragma config WRTB = OFF // Boot block (000000-0007FFh) not write-protected  

// Configuration Register Write Protection bit:
#pragma config WRTC = OFF // Configuration registers (300000-3000FFh) not write-protected  

// Data EEPROM Write Protection bit:
#pragma config WRTD = OFF // Data EEPROM not write-protected  

// Table Read Protection Block:
#pragma config EBTR0 = OFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks  
#pragma config EBTR1 = OFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
#pragma config EBTR2 = OFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks  
#pragma config EBTR3 = OFF // Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks  

// Boot Block Table Read Protection bit:
#pragma config EBTRB = OFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks  


