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00016 #ifndef _USB_DRV_H_
00017 #define _USB_DRV_H_
00018
00019
00020
00021
00022 typedef enum endpoint_parameter{ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter;
00023
00027
00028
00029
00030 #define MAX_EP_NB 7
00031
00032 #define EP_CONTROL 0
00033 #define EP_1 1
00034 #define EP_2 2
00035 #define EP_3 3
00036 #define EP_4 4
00037 #define EP_5 5
00038 #define EP_6 6
00039 #define EP_7 7
00040
00041 #define PIPE_CONTROL 0
00042 #define PIPE_0 0
00043 #define PIPE_1 1
00044 #define PIPE_2 2
00045 #define PIPE_3 3
00046 #define PIPE_4 4
00047 #define PIPE_5 5
00048 #define PIPE_6 6
00049 #define PIPE_7 7
00050
00051
00052 #define MSK_EP_DIR 0x7F
00053 #define MSK_UADD 0x7F
00054 #define MSK_EPTYPE 0xC0
00055 #define MSK_EPSIZE 0x70
00056 #define MSK_EPBK 0x0C
00057 #define MSK_DTSEQ 0x0C
00058 #define MSK_NBUSYBK 0x03
00059 #define MSK_CURRBK 0x03
00060 #define MSK_DAT 0xFF // UEDATX
00061 #define MSK_BYCTH 0x07 // UEBCHX
00062 #define MSK_BYCTL 0xFF // UEBCLX
00063 #define MSK_EPINT 0x7F // UEINT
00064 #define MSK_HADDR 0xFF // UHADDR
00065
00066
00067 #define MSK_PNUM 0x07 // UPNUM
00068 #define MSK_PRST 0x7F // UPRST
00069 #define MSK_PTYPE 0xC0 // UPCFG0X
00070 #define MSK_PTOKEN 0x30
00071 #define MSK_PEPNUM 0x0F
00072 #define MSK_PSIZE 0x70 // UPCFG1X
00073 #define MSK_PBK 0x0C
00074
00075 #define MSK_NBUSYBK 0x03
00076
00077 #define MSK_ERROR 0x1F
00078
00079 #define MSK_PTYPE 0xC0 // UPCFG0X
00080 #define MSK_PTOKEN 0x30
00081 #define MSK_TOKEN_SETUP 0x30
00082 #define MSK_TOKEN_IN 0x10
00083 #define MSK_TOKEN_OUT 0x20
00084 #define MSK_PEPNUM 0x0F
00085
00086 #define MSK_PSIZE 0x70 // UPCFG1X
00087 #define MSK_PBK 0x0C
00088
00089
00090
00091
00092 #define TYPE_CONTROL 0
00093 #define TYPE_ISOCHRONOUS 1
00094 #define TYPE_BULK 2
00095 #define TYPE_INTERRUPT 3
00096
00097
00098 #define DIRECTION_OUT 0
00099 #define DIRECTION_IN 1
00100
00101
00102 #define SIZE_8 0
00103 #define SIZE_16 1
00104 #define SIZE_32 2
00105 #define SIZE_64 3
00106 #define SIZE_128 4
00107 #define SIZE_256 5
00108 #define SIZE_512 6
00109 #define SIZE_1024 7
00110
00111
00112
00113 #define ONE_BANK 0
00114 #define TWO_BANKS 1
00115
00116
00117 #define NYET_ENABLED 0
00118 #define NYET_DISABLED 1
00119
00120
00121 #define TOKEN_SETUP 0
00122 #define TOKEN_IN 1
00123 #define TOKEN_OUT 2
00124
00125 #define Is_ep_addr_in(x) ( (x&0x80)? TRUE : FALSE)
00126
00127
00131 #define Usb_build_ep_config0(type, dir, nyet) ((type<<6) | (nyet<<1) | (dir))
00132 #define Usb_build_ep_config1(size, bank ) ((size<<4) | (bank<<2) )
00133 #define usb_configure_endpoint(num, type, dir, size, bank, nyet) \
00134 ( Usb_select_endpoint(num), \
00135 usb_config_ep(Usb_build_ep_config0(type, dir, nyet),\
00136 Usb_build_ep_config1(size, bank) ))
00137
00138 #define Host_build_pipe_config0(type, token, ep_num) ((type<<6) | (token<<4) | (ep_num))
00139 #define Host_build_pipe_config1(size, bank ) ((size<<4) | (bank<<2) )
00140 #define host_configure_pipe(num, type, token,ep_num, size, bank, freq) \
00141 ( Host_select_pipe(num), \
00142 Host_set_interrupt_frequency(freq), \
00143 host_config_pipe(Host_build_pipe_config0(type, token, ep_num),\
00144 Host_build_pipe_config1(size, bank) ))
00146
00151 #define Usb_enable_regulator() (REGCR &= ~(1<<REGDIS))
00153 #define Usb_disable_regulator() (REGCR |= (1<<REGDIS))
00155 #define Is_usb_regulator_enabled() ((REGCR & (1<<REGDIS)) ? FALSE : TRUE)
00157
00161
00163 #define Usb_enable() (USBCON |= ((1<<USBE) ))
00165 #define Usb_disable() (USBCON &= ~((1<<USBE)))
00166 #define Is_usb_enabled() ((USBCON & (1<<USBE)) ? TRUE : FALSE)
00167
00168 #define Usb_enable_device() (USBCON |= (1<<USBE))
00169 #define Usb_disable_device() (USBCON &= ~(1<<USBE))
00170 #define Usb_reset_macro_only() (UDCON &= ~(1<<RSTCPU))
00171 #define Usb_reset_all_system() (UDCON |= (1<<RSTCPU))
00172
00173 #if (VBUS_SENSING_IO == ENABLED)
00175 #define Usb_vbus_sense_init() (VBUS_SENSE_DDR &= ~(1<<VBUS_SENSE_IO), \
00176 VBUS_SENSE_PORT &= ~(1<<VBUS_SENSE_IO))
00178 #define Is_usb_vbus_on() (((VBUS_SENSE_PIN&(1<<VBUS_SENSE_IO)) != 0) ? TRUE : FALSE)
00180 #define Is_usb_vbus_off() (((VBUS_SENSE_PIN&(1<<VBUS_SENSE_IO)) == 0) ? TRUE : FALSE)
00181 #endif
00182
00184 #define Usb_freeze_clock() (USBCON |= (1<<FRZCLK))
00185 #define Usb_unfreeze_clock() (USBCON &= ~(1<<FRZCLK))
00186 #define Is_usb_clock_freezed() ((USBCON & (1<<FRZCLK)) ? TRUE : FALSE)
00187
00188 #define Ps2_enable_device() (PS2CON |= (1<<PS2EN))
00189 #define Ps2_disable_device() (PS2CON &= ~(1<<PS2EN))
00190
00191 #define Usb_direct_drive_usb_enable() (UPOE |= (1<<UPWE1), UPOE &= ~(1<<UPWE0))
00192 #define Usb_direct_drive_ps2_enable() (UPOE |= ((1<<UPWE1) | (1<<UPWE0)))
00193 #define Usb_direct_drive_disable() (UPOE &= ~((1<<UPWE1) | (1<<UPWE0)))
00194 #define Usb_drive_dp_high() (UPOE |= (1<<UPDRV1))
00195 #define Usb_drive_dp_low() (UPOE &= ~(1<<UPDRV1))
00196 #define Usb_drive_dm_high() (UPOE |= (1<<UPDRV0))
00197 #define Usb_drive_dm_low() (UPOE &= ~(1<<UPDRV0))
00198 #define Ps2_drive_sck_high() (UPOE |= (1<<UPDRV1))
00199 #define Ps2_drive_sck_low() (UPOE &= ~(1<<UPDRV1))
00200 #define Ps2_drive_data_high() (UPOE |= (1<<UPDRV0))
00201 #define Ps2_drive_data_low() (UPOE &= ~(1<<UPDRV0))
00202
00203
00205 #define Usb_get_general_interrupt() (USBINT & (USBCON & MSK_IDTE_VBUSTE))
00207 #define Usb_ack_all_general_interrupt() (USBINT = ~(USBCON & MSK_IDTE_VBUSTE))
00208 #define Usb_ack_cache_id_transition(x) ((x) &= ~(1<<IDTI))
00209 #define Usb_ack_cache_vbus_transition(x) ((x) &= ~(1<<VBUSTI))
00210 #define Is_usb_cache_id_transition(x) (((x) & (1<<IDTI)) )
00211 #define Is_usb_cache_vbus_transition(x) (((x) & (1<<VBUSTI)))
00212
00214
00215
00220 #define Usb_initiate_remote_wake_up() (UDCON |= (1<<RMWKUP))
00222 #define Usb_detach() (UDCON |= (1<<DETACH))
00224 #define Usb_attach() (UDCON &= ~(1<<DETACH))
00226 #define Is_usb_pending_remote_wake_up() ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE)
00228 #define Is_usb_detached() ((UDCON & (1<<DETACH)) ? TRUE : FALSE)
00229
00231 #define Usb_get_device_interrupt() (UDINT & (1<<UDIEN))
00233 #define Usb_ack_all_device_interrupt() (UDINT = ~(1<<UDIEN))
00234
00236 #define Usb_enable_remote_wake_up_interrupt() (UDIEN |= (1<<UPRSME))
00238 #define Usb_disable_remote_wake_up_interrupt() (UDIEN &= ~(1<<UPRSME))
00239 #define Is_remote_wake_up_interrupt_enabled() ((UDIEN & (1<<UPRSME)) ? TRUE : FALSE)
00241 #define Usb_ack_remote_wake_up_start() (UDINT = ~(1<<UPRSMI))
00243 #define Is_usb_remote_wake_up_start() ((UDINT & (1<<UPRSMI)) ? TRUE : FALSE)
00244
00246 #define Usb_enable_resume_interrupt() (UDIEN |= (1<<EORSME))
00248 #define Usb_disable_resume_interrupt() (UDIEN &= ~(1<<EORSME))
00249 #define Is_resume_interrupt_enabled() ((UDIEN & (1<<EORSME)) ? TRUE : FALSE)
00251 #define Usb_ack_resume() (UDINT = ~(1<<EORSMI))
00253 #define Is_usb_resume() ((UDINT & (1<<EORSMI)) ? TRUE : FALSE)
00254
00256 #define Usb_enable_wake_up_interrupt() (UDIEN |= (1<<WAKEUPE))
00258 #define Usb_disable_wake_up_interrupt() (UDIEN &= ~(1<<WAKEUPE))
00259 #define Is_swake_up_interrupt_enabled() ((UDIEN & (1<<WAKEUPE)) ? TRUE : FALSE)
00261 #define Usb_ack_wake_up() (UDINT = ~(1<<WAKEUPI))
00263 #define Is_usb_wake_up() ((UDINT & (1<<WAKEUPI)) ? TRUE : FALSE)
00264
00266 #define Usb_enable_reset_interrupt() (UDIEN |= (1<<EORSTE))
00268 #define Usb_disable_reset_interrupt() (UDIEN &= ~(1<<EORSTE))
00269 #define Is_reset_interrupt_enabled() ((UDIEN & (1<<EORSTE)) ? TRUE : FALSE)
00271 #define Usb_ack_reset() (UDINT = ~(1<<EORSTI))
00273 #define Is_usb_reset() ((UDINT & (1<<EORSTI)) ? TRUE : FALSE)
00274
00276 #define Usb_enable_sof_interrupt() (UDIEN |= (1<<SOFE))
00278 #define Usb_disable_sof_interrupt() (UDIEN &= ~(1<<SOFE))
00279 #define Is_sof_interrupt_enabled() ((UDIEN & (1<<SOFE)) ? TRUE : FALSE)
00281 #define Usb_ack_sof() (UDINT = ~(1<<SOFI))
00283 #define Is_usb_sof() ((UDINT & (1<<SOFI)) ? TRUE : FALSE)
00284
00286 #define Usb_enable_suspend_interrupt() (UDIEN |= (1<<SUSPE))
00288 #define Usb_disable_suspend_interrupt() (UDIEN &= ~(1<<SUSPE))
00290 #define Is_suspend_interrupt_enabled() ((UDIEN & (1<<SUSPE)) ? TRUE : FALSE)
00292 #define Usb_ack_suspend() (UDINT = ~(1<<SUSPI))
00294 #define Is_usb_suspend() ((UDINT & (1<<SUSPI)) ? TRUE : FALSE)
00295
00297 #define Usb_enable_address() (UDADDR |= (1<<ADDEN))
00299 #define Usb_disable_address() (UDADDR &= ~(1<<ADDEN))
00301 #define Is_usb_addressed() ((UDADDR & (1<<ADDEN)) ? TRUE : FALSE)
00303 #define Usb_configure_address(addr) (UDADDR = (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD))
00304
00306 #define Usb_frame_number() ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML)))
00308 #define Is_usb_frame_number_crc_error() ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE)
00310
00311
00312
00313
00318 #define Usb_select_endpoint(ep) (UENUM = (U8)ep )
00319
00321 #define Usb_get_selected_endpoint() (UENUM )
00322
00324 #define Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0)
00325
00327 #define Usb_enable_endpoint() (UECONX |= (1<<EPEN))
00329 #define Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ))
00331 #define Usb_reset_data_toggle() (UECONX |= (1<<RSTDT))
00333 #define Usb_disable_endpoint() (UECONX &= ~(1<<EPEN))
00335 #define Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC))
00337 #define Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS))
00339 #define Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE)
00341 #define Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE)
00342
00344 #define Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6))
00346 #define Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir))
00347
00349 #define Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4))
00351 #define Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2))
00353 #define Usb_allocate_memory() (UECFG1X |= (1<<ALLOC))
00355 #define Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC))
00356
00358 #define Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI))
00360 #define Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI))
00362 #define Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN))
00364 #define Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2)
00366 #define Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK)
00368 #define Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE)
00370 #define Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE)
00372 #define Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE)
00374 #define Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE)
00376 #define Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE)
00377
00379 #define Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2)
00381 #define Usb_current_bank() ( UESTA1X & MSK_CURRBK)
00382
00384 #define Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON))
00386 #define Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI))
00388 #define Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI))
00390 #define Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI))
00392 #define Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon())
00394 #define Usb_ack_stalled() (MSK_STALLEDI= 0)
00396 #define Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon())
00398 #define Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI))
00400 #define Is_usb_read_enabled() (UEINTX&(1<<RWAL))
00402 #define Is_usb_write_enabled() (UEINTX&(1<<RWAL))
00404 #define Is_usb_read_control_enabled() (UEINTX&(1<<TXINI))
00406 #define Is_usb_nak_out_sent() (UEINTX&(1<<NAKOUTI))
00408 #define Is_usb_receive_setup() (UEINTX&(1<<RXSTPI))
00410 #define Is_usb_receive_out() (UEINTX&(1<<RXOUTI))
00412 #define Is_usb_in_ready() (UEINTX&(1<<TXINI))
00414 #define Usb_send_in() (UEINTX &= ~(1<<FIFOCON))
00416 #define Usb_send_control_in() (UEINTX &= ~(1<<TXINI))
00418 #define Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON))
00420 #define Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI))
00421
00423 #define Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE))
00425 #define Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE))
00427 #define Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE))
00429 #define Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE))
00431 #define Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE))
00433 #define Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE))
00435 #define Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXIN))
00437 #define Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE))
00439 #define Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE))
00441 #define Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE))
00443 #define Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE))
00445 #define Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE))
00447 #define Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE))
00449 #define Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXIN))
00450
00452 #define Usb_read_byte() (UEDATX)
00454 #define Usb_write_byte(byte) (UEDATX = (U8)byte)
00455
00457 #define Usb_byte_counter() ((U8)(UEBCLX))
00459 #define Usb_byte_counter_8() ((U8)UEBCLX)
00460
00462 #define Usb_interrupt_flags() (UEINT)
00464 #define Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00)
00466
00467
00468
00475
00476 #define wSWAP(x) \
00477 ( (((x)>>8)&0x00FF) \
00478 | (((x)<<8)&0xFF00) \
00479 )
00480
00481
00489 #if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN)
00490 #error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN
00491 #endif
00492 #ifdef LITTLE_ENDIAN
00493 #define Usb_write_word_enum_struc(x) (x)
00494 #else //BIG_ENDIAN
00495 #define Usb_write_word_enum_struc(x) (wSWAP(x))
00496 #endif
00497
00498
00500
00501
00502
00503 U8 usb_config_ep (U8, U8);
00504 U8 usb_select_enpoint_interrupt (void);
00505 U16 usb_get_nb_byte_epw (void);
00506 U8 usb_send_packet (U8 , U8*, U8);
00507 U8 usb_read_packet (U8 , U8*, U8);
00508 void usb_halt_endpoint (U8);
00509 void usb_reset_endpoint (U8);
00510 U8 usb_init_device (void);
00511
00512
00513 #endif // _USB_DRV_H_
00514