Offset | Field | Description |
---|---|---|
0x0 | RSTC_RCR (SYSC_RCR) | Reset Control Register |
0x4 | RSTC_RSR (SYSC_RSR) | Reset Status Register |
0x8 | RSTC_RMR (SYSC_RMR) | Reset Mode Register |
Offset | Name | Description |
---|---|---|
0 | SYSC_PROCRST AT91C_SYSC_PROCRST | Processor Reset 0 = No effect. 1 = If KEY is correct, resets the processor. |
1 | SYSC_ICERST AT91C_SYSC_ICERST | ICE Interface Reset 0 = No effect. 1 = If KEY is correct, resets the processor's ICE Interface. |
2 | SYSC_PERRST AT91C_SYSC_PERRST | Peripheral Reset 0 = No effect. 1 = If KEY is correct, resets the peripherals. |
3 | SYSC_EXTRST AT91C_SYSC_EXTRST | External Reset 0 = No effect. 1 = If KEY is correct, asserts the NRST pin. |
31..24 | SYSC_KEY AT91C_SYSC_KEY | Password Should be written at value 0xA5. Writting any other value in this field aborts the write operation. |
Offset | Name | Description | ||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 | SYSC_URSTS AT91C_SYSC_URSTS | User Reset Status 0 = No high-to-low edge on NRST happened since the last read of SYSC_RSR. 1 = At least one high-to-low transition of NRST has been detected since the last read of SYSC_RSR. | ||||||||||||||||||
1 | SYSC_BODSTS AT91C_SYSC_BODSTS | Brown-out Detection Status 0 = No brown-out high-to-low transition happened since the last read of SYSC_RSR. 1 = A brown-out high-to-low transition has been detected since the last read of SYSC_RSR. | ||||||||||||||||||
10..8 | SYSC_RSTTYP AT91C_SYSC_RSTTYP | Reset Type Reports the cause of the last processor reset.
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16 | SYSC_NRSTL AT91C_SYSC_NRSTL | NRST pin level Registers the NRST level. | ||||||||||||||||||
17 | SYSC_SRCMP AT91C_SYSC_SRCMP | Software Reset Command in Progress. 0 = No software command is being performed. The reset controller is ready for a software command. 1 = A software reset command is being performed by the reset controller, the reset controller is busy. |
Offset | Name | Description |
---|---|---|
0 | SYSC_URSTEN AT91C_SYSC_URSTEN | User Reset Enable 0 = The detection of a low level on the pin NRST does not generate a User Reset. 1 = The detection of a low level on the pin NRST does not generate a User Reset. |
4 | SYSC_URSTIEN AT91C_SYSC_URSTIEN | User Reset Interrupt Enable 0 = USRTS bit in SYSC_RSR at 1 has no effect on SCIRQ. 1 = USRTS bit in SYSC_RSR at 1 asserts SCIRQ. |
11..8 | SYSC_ERSTL AT91C_SYSC_ERSTL | User Reset Enable The external reset is asserted during a time of 2 power (ERSTL+1). This allows assertion duration to be programmed between 60us and 2s. |
16 | SYSC_BODIEN AT91C_SYSC_BODIEN | Brown-out Detection Interrupt Enable 0 = BODSTS at 1 in RSTC_SR has no effect on rstc_irq. 1 = BODSTS at 1 in RSTC_SR asserts rstc_irq. |
31..24 | SYSC_KEY AT91C_SYSC_KEY | Password Should be written at value 0xA5. Writting any other value in this field aborts the write operation. |